AJ

Ajey Poovannummoottil Jacob

Globalfoundries: 23 patents #12 of 1,311Top 1%
IBM: 5 patents #1,186 of 10,852Top 15%
SS Stmicroelectronics Sa: 2 patents #29 of 135Top 25%
RE Renesas Electronics: 1 patents #273 of 915Top 30%
University of California: 1 patents #249 of 1,694Top 15%
📍 Los Angeles, CA: #4 of 1,427 inventorsTop 1%
🗺 California: #208 of 60,394 inventorsTop 1%
Overall (2017): #1,088 of 506,227Top 1%
24
Patents 2017

Issued Patents 2017

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDate
9842897 Bulk finFET with partial dielectric isolation featuring a punch-through stopping layer under the oxide Murat Kerem Akarvardar 2017-12-12
9831131 Method for forming nanowires including multiple integrated devices with alternate channel materials 2017-11-28
9824935 Methods of forming NMOS and PMOS FinFET devices and the resulting product 2017-11-21
9812393 Programmable via devices with metal/semiconductor via links and fabrication methods thereof Suraj K. Patil, Min-hwa Chi 2017-11-07
9799767 Methods of forming PMOS and NMOS FinFET devices on CMOS based integrated circuit products 2017-10-24
9754843 Heterogeneous integration of 3D Si and III-V vertical nanowire structures for mixed signal circuits fabrication Suraj K. Patil 2017-09-05
9754903 Semiconductor structure with anti-efuse device Suraj K. Patil, Min-hwa Chi 2017-09-05
9748387 Methods of forming PMOS FinFET devices and multiple NMOS FinFET devices with different performance characteristics 2017-08-29
9741622 Methods of forming NMOS and PMOS FinFET devices and the resulting product 2017-08-22
9716174 Electrical isolation of FinFET active region by selective oxidation of sacrificial layer Murat Kerem Akarvardar, Jody A. Fronheiser 2017-07-25
9698025 Directed self-assembly material growth mask for forming vertical nanowires Steven Bentley, Richard A. Farrell, Gerard Schmid 2017-07-04
9691497 Programmable devices with current-facilitated migration and fabrication methods Suraj K. Patil, Min-hwa Chi 2017-06-27
9673222 Fin isolation structures facilitating different fin isolation schemes Kangguo Cheng, Bruce B. Doris, Nicolas Loubet, Prasanna Khare, Rama Divakaruni 2017-06-06
9673083 Methods of forming fin isolation regions on FinFET semiconductor devices by implantation of an oxidation-retarding material Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz, Kern Rim 2017-06-06
9634123 FinFET device including a dielectrically isolated silicon alloy fin 2017-04-25
9633947 Folded ballistic conductor interconnect line 2017-04-25
9627245 Methods of forming alternative channel materials on a non-planar semiconductor device and the resulting device Bruce B. Doris, Kangguo Cheng, Nicolas Loubet 2017-04-18
9614058 Methods of forming low defect replacement fins for a FinFET semiconductor device and the resulting devices Jody A. Fronheiser, Witold P. Maszara, Kerem Akarvardar 2017-04-04
9589849 Methods of modulating strain in PFET and NFET FinFET semiconductor devices Murat Kerem Akarvardar, Bruce B. Doris, Ali Khakifirooz 2017-03-07
9590040 Methods of forming fins for a FinFET device by forming and replacing sacrificial fin structures with alternative materials Murat Kerem Akarvardar 2017-03-07
9570244 Solid-state supercapacitor Bruce S. Dunn, Chi On Chui, Daniel Membreno, Leland Smith 2017-02-14
9564447 Methods for fabricating programmable devices and related structures Suraj K. Patil, Min-hwa Chi 2017-02-07
9564486 Self-aligned dual-height isolation for bulk FinFET Murat Kerem Akarvardar, Steven Bentley, Kangguo Cheng, Bruce B. Doris, Jody A. Fronheiser +2 more 2017-02-07
9564367 Methods of forming different FinFET devices with different threshold voltages and integrated circuit products containing such devices Witold P. Maszara, Kerem Akarvardar 2017-02-07