Issued Patents 2017
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853151 | Fully silicided linerless middle-of-line (MOL) contact | Tenko Yamashita | 2017-12-26 |
| 9812571 | Tensile strained high percentage silicon germanium alloy FinFETs | Bruce B. Doris, Pouya Hashemi, Alexander Reznicek, Robin M. Schulz | 2017-11-07 |
| 9786546 | Bulk to silicon on insulator device | Terence B. Hook, Tenko Yamashita | 2017-10-10 |
| 9761498 | Selective oxidation of buried silicon-germanium to form tensile strained silicon FinFETs | Bruce B. Doris, Alexander Reznicek, Tenko Yamashita | 2017-09-12 |
| 9741684 | Wafer bonding edge protection using double patterning with edge exposure | — | 2017-08-22 |
| 9735062 | Defect reduction in channel silicon germanium on patterned silicon | Bruce B. Doris, Nicolas Loubet, Alexander Reznicek | 2017-08-15 |
| 9711501 | Interlayer via | Veeraraghavan S. Basker, Lawrence A. Clevenger, Terence B. Hook, Tenko Yamashita | 2017-07-18 |
| 9634113 | Fully silicided linerless middle-of-line (MOL) contact | Tenko Yamashita | 2017-04-25 |
| 9634028 | Metallized junction FinFET structures | Bruce B. Doris, Pranita Kerber, Alexander Reznicek | 2017-04-25 |
| 9627410 | Metallized junction FinFET structures | Bruce B. Doris, Pranita Kerber, Alexander Reznicek | 2017-04-18 |
| 9570590 | Selective oxidation of buried silicon-germanium to form tensile strained silicon FinFETs | Bruce B. Doris, Alexander Reznicek, Tenko Yamashita | 2017-02-14 |