| 9853127 |
Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process |
Brent A. Anderson, Huiming Bu, Fee Li Lie, Junli Wang |
2017-12-26 |
| 9818650 |
Extra gate device for nanosheet |
Bruce B. Doris, Junli Wang |
2017-11-14 |
| 9805935 |
Bottom source/drain silicidation for vertical field-effect transistor (FET) |
Brent A. Anderson, Huiming Bu, Fee Li Lie, Junli Wang |
2017-10-31 |
| 9793271 |
Semiconductor device with different fin pitches |
Bruce B. Doris |
2017-10-17 |
| 9786546 |
Bulk to silicon on insulator device |
Joshua M. Rubin, Tenko Yamashita |
2017-10-10 |
| 9768079 |
Extra gate device for nanosheet |
Bruce B. Doris, Junli Wang |
2017-09-19 |
| 9761712 |
Vertical transistors with merged active area regions |
Brent A. Anderson, Albert M. Chu, Seong-Dong Kim |
2017-09-12 |
| 9761525 |
Multiple back gate transistor |
Richard A. Phelps, Anthony K. Stamper, Renata Camillo-Castillo |
2017-09-12 |
| 9741707 |
Immunity to inline charging damage in circuit designs |
Zachary Henderson, Jason D. Hibbeler, Nicholas Palmer, Kirk D. Peterson |
2017-08-22 |
| 9741706 |
Immunity to inline charging damage in circuit designs |
Zachary Henderson, Jason D. Hibbeler, Nicholas Palmer, Kirk D. Peterson |
2017-08-22 |
| 9735250 |
Stable work function for narrow-pitch devices |
Takashi Ando, Mohit Bajaj, Rajan K. Pandey, Rajesh Sathiyanarayanan |
2017-08-15 |
| 9711501 |
Interlayer via |
Veeraraghavan S. Basker, Lawrence A. Clevenger, Joshua M. Rubin, Tenko Yamashita |
2017-07-18 |
| 9673221 |
Semiconductor device with low band-to-band tunneling |
Nicolas Degors |
2017-06-06 |
| 9673190 |
ESD device compatible with bulk bias capability |
Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Pranita Kerber, Balasubramanian Pranatharthiharan +1 more |
2017-06-06 |
| 9666693 |
Structure and method to minimize junction capacitance in NANO sheets |
Bruce B. Doris, Xin Miao |
2017-05-30 |
| 9653463 |
Semiconductor device with different fin pitches |
Bruce B. Doris |
2017-05-16 |
| 9627484 |
Devices with multiple threshold voltages formed on a single wafer using strain in the high-K layer |
Takashi Ando, Mohit Bajaj, Rajan K. Pandey, Rajesh Sathiyanarayanan |
2017-04-18 |
| 9601513 |
Subsurface wires of integrated chip and methods of forming |
Andreas Scholze, Lars Liebmann, Roger QUON, Andrew H. Simon |
2017-03-21 |
| 9589956 |
Semiconductor device with different fin pitches |
Bruce B. Doris |
2017-03-07 |
| 9583486 |
Stable work function for narrow-pitch devices |
Takashi Ando, Mohit Bajaj, Rajan K. Pandey, Rajesh Sathiyanarayanan |
2017-02-28 |
| 9577038 |
Structure and method to minimize junction capacitance in nano sheets |
Bruce B. Doris, Xin Miao |
2017-02-21 |
