| 9818873 |
Forming stressed epitaxial layers between gates separated by different pitches |
Emre Alptekin, Injo Ok, Balasubramanian Pranatharthiharan, Ravikumar Ramachandran, Soon-Cheon Seo +2 more |
2017-11-14 |
| 9812324 |
Methods to control fin tip placement |
Lei Zhuang, Stuart A. Sieg, Fee Li Lie, Mahender Kumar, Shreesh Narasimha +3 more |
2017-11-07 |
| 9812351 |
Interconnection cells having variable width metal lines and fully-self aligned continuity cuts |
Nicholas V. LiCausi, Guillaume Bouche |
2017-11-07 |
| 9768113 |
Self aligned via in integrated circuit |
Yannick Feurprier, Joe Lee, Yann Mignot, Terry A. Spooner, Douglas M. Trickett +1 more |
2017-09-19 |
| 9735054 |
Gate tie-down enablement with inner spacer |
Su Chen Fan, Andre P. Labonte, Sanjay C. Mehta |
2017-08-15 |
| 9627257 |
Gate tie-down enablement with inner spacer |
Su Chen Fan, Andre P. Labonte, Sanjay C. Mehta |
2017-04-18 |
| 9601513 |
Subsurface wires of integrated chip and methods of forming |
Terence B. Hook, Andreas Scholze, Roger QUON, Andrew H. Simon |
2017-03-21 |
| 9570573 |
Self-aligned gate tie-down contacts with selective etch stop liner |
Su Chen Fan, Ruilong Xie |
2017-02-14 |
