SN

Shreesh Narasimha

IBM: 11 patents #380 of 10,852Top 4%
Globalfoundries: 3 patents #173 of 1,311Top 15%
📍 Beacon, NY: #1 of 34 inventorsTop 3%
🗺 New York: #159 of 12,278 inventorsTop 2%
Overall (2017): #3,320 of 506,227Top 1%
14
Patents 2017

Issued Patents 2017

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
9837319 Asymmetric high-K dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-12-05
9812396 Interconnect structure for semiconductor devices with multiple power rails and redundancy Jason E. Stephens, Guillaume Bouche, Patrick R. Justison, Byoung Youp Kim, Craig Child 2017-11-07
9812324 Methods to control fin tip placement Lei Zhuang, Lars Liebmann, Stuart A. Sieg, Fee Li Lie, Mahender Kumar +3 more 2017-11-07
9786545 Method of forming ANA regions in an integrated circuit Guillaume Bouche, Jason E. Stephens, Byoung Youp Kim, Craig Child 2017-10-10
9768071 Asymmetric high-K dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-09-19
9768195 Semiconductor structure with integrated passive structures Anthony I. Chou, Arvind Kumar, Renee T. Mo 2017-09-19
9721843 Asymmetric high-k dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-08-01
9698159 Semiconductor structure with integrated passive structures Anthony I. Chou, Arvind Kumar, Renee T. Mo 2017-07-04
9685379 Asymmetric high-k dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-06-20
9659961 Semiconductor structure with integrated passive structures Anthony I. Chou, Arvind Kumar, Renee T. Mo 2017-05-23
9577061 Asymmetric high-K dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-02-21
9570354 Asymmetric high-K dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-02-14
9559010 Asymmetric high-k dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-01-31
9543213 Asymmetric high-k dielectric for reducing gate induced drain leakage Anthony I. Chou, Arvind Kumar, Chung-Hsun Lin, Claude Ortolland, Jonathan T. Shaw 2017-01-10