Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9818623 | Method of forming a pattern for interconnection lines and associated continuity blocks in an integrated circuit | Jason E. Stephens, Guillaume Bouche, Byoung Youp Kim | 2017-11-14 |
| 9812396 | Interconnect structure for semiconductor devices with multiple power rails and redundancy | Jason E. Stephens, Guillaume Bouche, Shreesh Narasimha, Patrick R. Justison, Byoung Youp Kim | 2017-11-07 |
| 9786545 | Method of forming ANA regions in an integrated circuit | Guillaume Bouche, Jason E. Stephens, Byoung Youp Kim, Shreesh Narasimha | 2017-10-10 |
| 9691971 | Integrated circuits including magnetic tunnel junctions for magnetoresistive random-access memory and methods for fabricating the same | Seowoo Nam, Ming He, Hyun-Jin Cho | 2017-06-27 |