| 9852986 |
Method of patterning pillars to form variable continuity cuts in interconnection lines of an integrated circuit |
Guillaume Bouche |
2017-12-26 |
| 9825031 |
Methods of forming a high-k contact liner to improve effective via separation distance and the resulting devices |
Guillaume Bouche, Andy Wei, David Permana, Jagannathan Vasudevan |
2017-11-21 |
| 9818623 |
Method of forming a pattern for interconnection lines and associated continuity blocks in an integrated circuit |
Guillaume Bouche, Byoung Youp Kim, Craig Child |
2017-11-14 |
| 9818640 |
Apparatus and method of forming self-aligned cuts in a non-mandrel line of an array of metal lines |
Guillaume Bouche |
2017-11-14 |
| 9818641 |
Apparatus and method of forming self-aligned cuts in mandrel and a non-mandrel lines of an array of metal lines |
Guillaume Bouche |
2017-11-14 |
| 9818651 |
Methods, apparatus and system for a passthrough-based architecture |
Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jongwook Kye +3 more |
2017-11-14 |
| 9812396 |
Interconnect structure for semiconductor devices with multiple power rails and redundancy |
Guillaume Bouche, Shreesh Narasimha, Patrick R. Justison, Byoung Youp Kim, Craig Child |
2017-11-07 |
| 9786545 |
Method of forming ANA regions in an integrated circuit |
Guillaume Bouche, Byoung Youp Kim, Craig Child, Shreesh Narasimha |
2017-10-10 |
| 9779943 |
Compensating for lithographic limitations in fabricating semiconductor interconnect structures |
Guillaume Bouche |
2017-10-03 |
| 9691626 |
Method of forming a pattern for interconnection lines in an integrated circuit wherein the pattern includes gamma and beta block mask portions |
Guillaume Bouche |
2017-06-27 |
| 9660040 |
Transistor contacts self-aligned two dimensions |
Andy Wei, Guillaume Bouche, Mark A. Zaleski, Tuhin Guha Neogi, Jongwook Kye +1 more |
2017-05-23 |
| 9576735 |
Vertical capacitors with spaced conductive lines |
Roderick A. Augur |
2017-02-21 |
