Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9780002 | Threshold voltage and well implantation method for semiconductor devices | Xintuo Dai, Mahender Kumar, Daniel James Dechene, Daniel Jaeger | 2017-10-03 |
| 9673197 | FinFET with constrained source-drain epitaxial region | Arvind Kumar, Dan M. Mocuta | 2017-06-06 |
| 9536879 | FinFET with constrained source-drain epitaxial region | Arvind Kumar, Dan M. Mocuta | 2017-01-03 |
| 9536985 | Epitaxial growth of material on source/drain regions of FinFET structure | Michael P. Chudzik, Eric C. Harley, Judson R. Holt, Yue Ke, Rishikesh Krishnan +2 more | 2017-01-03 |