Issued Patents All Time
Showing 76–100 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7544281 | Uniform current distribution for ECP loading of wafers | Ming-Wei Lin | 2009-06-09 |
| 7476306 | Method and apparatus for electroplating | Hung-Wen Su, Chien-Hsueh Shih | 2009-01-13 |
| 7354856 | Method for forming dual damascene structures with tapered via portions and improved performance | Ming-Shih Yeh, Shau-Lin Shue, Chen-Hua Yu | 2008-04-08 |
| 7312531 | Semiconductor device and fabrication method thereof | Hui-Lin Chang, Yung-Cheng Lu, Chung-Chi Ko, Pi-Tsung Chen, Shau-Lin Shue +2 more | 2007-12-25 |
| 7250683 | Method to solve via poisoning for porous low-k dielectric | Jing-Cheng Lin, Shau-Lin Shue, Chen-Hua Yu | 2007-07-31 |
| 7235482 | Method of manufacturing a contact interconnection layer containing a metal and nitrogen by atomic layer deposition for deep sub-micron semiconductor technology | Chii-Ming Wu, Ching-Hua Hsieh, Shau-Lin Shue | 2007-06-26 |
| 7226860 | Method and apparatus for fabricating metal layer | Hsien-Ming Lee, Jing-Cheng Lin, Shing-Chyang Pan, Hung-Wen Su, Shih-Wei Chou +3 more | 2007-06-05 |
| 7169700 | Metal interconnect features with a doping gradient | Chung-Liang Chang, Winston Sue | 2007-01-30 |
| 7064068 | Method to improve planarity of electroplated copper | Shih-Wei Chou, Ming-Wei Lin | 2006-06-20 |
| 7026244 | Low resistance and reliable copper interconnects by variable doping | Ting-Chu Ko, Chien-Hsueh Shih | 2006-04-11 |
| 6878615 | Method to solve via poisoning for porous low-k dielectric | Jing-Cheng Lin, Shau-Lin Shue, Chen-Hua Yu | 2005-04-12 |
| 6793797 | Method for integrating an electrodeposition and electro-mechanical polishing process | Shih-Wei Chou, Winston Shue, Mong-Song Liang | 2004-09-21 |
| 6759750 | Method for integrating low-K materials in semiconductor fabrication | Shau-Lin Shue | 2004-07-06 |
| 6706166 | Method for improving an electrodeposition process through use of a multi-electrode assembly | Shih-Wei Chou | 2004-03-16 |
| 6660577 | Method for fabricating metal gates in deep sub-micron devices | Sheng-Hsiung Chen | 2003-12-09 |
| 6649513 | Copper back-end-of-line by electropolish | Shih-Wei Chou, Winston Shue, Mong-Song Liang | 2003-11-18 |
| 6620725 | Reduction of Cu line damage by two-step CMP | Shau-Lin Shue, Wen-Jye Tsai, Ying-Ho Chen, Tsu Shih, Jih-Churng Twu +1 more | 2003-09-16 |
| 6573187 | Method of forming dual damascene structure | Sheng-Hsiung Chen | 2003-06-03 |
| 6562725 | Dual damascene structure employing nitrogenated silicon carbide and non-nitrogenated silicon carbide etch stop layers | Ching-Hua Hsieh, Shau-Lin Shue, Chen-Hua Yu | 2003-05-13 |
| 6489684 | Reduction of electromigration in dual damascene connector | Sheng-Hsiung Chen, Tsu Shi | 2002-12-03 |
| 6479389 | Method of doping copper metallization | Sheng Hsiang Chen | 2002-11-12 |
| 6420258 | Selective growth of copper for advanced metallization | Sheng-Hsiung Chen | 2002-07-16 |
| 6406956 | Poly resistor structure for damascene metal gate | Chii-Ming Wu | 2002-06-18 |
| 6399486 | Method of improved copper gap fill | Sheng-Hsiung Chen | 2002-06-04 |
| 6319831 | Gap filling by two-step plating | Wen-Jye Tsai | 2001-11-20 |