Issued Patents All Time
Showing 251–275 of 425 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11080455 | Layout design of integrated circuit with through-substrate via | Chih-Chia Hu, Sen-Bor Jan, Meng-Wei Chiang | 2021-08-03 |
| 11069658 | System on integrated chips and methods of forming same | Sung-Feng Yeh, Chen-Hua Yu | 2021-07-20 |
| 11069608 | Semiconductor structure and manufacturing method thereof | Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih | 2021-07-20 |
| 11063022 | Package and manufacturing method of reconstructed wafer | Chao-Wen Shih, Hsien-Wei Chen, Sung-Feng Yeh, Tzuan-Horng Liu | 2021-07-13 |
| 11063019 | Package structure, chip structure and method of fabricating the same | Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih | 2021-07-13 |
| 11056438 | Semiconductor packages and method of forming the same | Nien-Fang Wu, Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih | 2021-07-06 |
| 11043482 | Semiconductor component, package structure and manufacturing method thereof | Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai | 2021-06-22 |
| 11043481 | Method of manufacturing semiconductor package structure | Yi-Hsiu Chen, Chen-Hua Yu, Wen-Chih Chiou | 2021-06-22 |
| 11031354 | Mixing organic materials into hybrid packages | Hsien-Wei Chen, Chih-Chia Hu, Chen-Hua Yu | 2021-06-08 |
| 11024605 | Integrated circuit package and method | Tzuan-Horng Liu, Chao-Wen Shih, Sung-Feng Yeh, Nien-Fang Wu | 2021-06-01 |
| 11018104 | Semiconductor structure and method for manufacturing the same | Hsien-Wei Chen | 2021-05-25 |
| 11018070 | Semiconductor die, manufacturing method thereof, and semiconductor package | Jie Chen, Hsien-Wei Chen | 2021-05-25 |
| 11018066 | Integrated circuit package and method of forming same | Hsien-Wei Chen, Chen-Hua Yu | 2021-05-25 |
| 11004826 | 3DIC formation with dies bonded to formed RDLs | Chen-Hua Yu, Sung-Feng Yeh | 2021-05-11 |
| 10998293 | Method of fabricating semiconductor structure | Hsien-Wei Chen, Jie Chen, Ching-Jung Yang | 2021-05-04 |
| 10978410 | Semiconductor structure and manufacturing method thereof | Tzuan-Horng Liu, Hsien-Wei Chen | 2021-04-13 |
| 10971417 | 3D stacked-chip package | Chen-Hua Yu, Wen-Sen Lu, Wen-Chih Chiou, Wen-Ching Tsai | 2021-04-06 |
| 10971443 | Packages with Si-substrate-free interposer and method forming same | Chen-Hua Yu, Sung-Feng Yeh, Hsien-Wei Chen | 2021-04-06 |
| 10957610 | Integrated circuit component and package structure having the same | Tzuan-Horng Liu, Chao-Hsiang Yang, Hsien-Wei Chen | 2021-03-23 |
| 10950576 | Package structure | Tzuan-Horng Liu, Hsien-Wei Chen, Jiun-Heng Wang | 2021-03-16 |
| 10950579 | Integrated circuit package and method of forming same | Hsien-Wei Chen, Chen-Hua Yu | 2021-03-16 |
| 10937743 | Mixing organic materials into hybrid packages | Hsien-Wei Chen, Chih-Chia Hu, Chen-Hua Yu | 2021-03-02 |
| 10930633 | Buffer design for package integration | Jie Chen, Hsien-Wei Chen, Chen-Hua Yu | 2021-02-23 |
| 10930580 | Semiconductor device and method of manufacture | Chih-Chia Hu, Sen-Bor Jan, Hsien-Wei Chen | 2021-02-23 |
| 10923431 | Method for forming a 3D IC architecture including forming a first die on a first side of a first interconnect structure and a second die in an opening formed in a second side | Hsien-Pin Hu, Chen-Hua Yu, Jing-Cheng Lin, Jiun-Ren Lai, Yung-Chi Lin | 2021-02-16 |