Issued Patents All Time
Showing 101–125 of 125 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8841214 | Dual damascene process | Chia-Ying Lee | 2014-09-23 |
| 8828885 | Photo resist trimmed line end space | Chia-Ying Lee, Ming-Feng Shieh, Shih-Ming Chang, Chih-Ming Lai, Ken-Hsien Hsieh +1 more | 2014-09-09 |
| 8697537 | Method of patterning for a semiconductor device | Chia-Ying Lee, Chih-Yuan Ting | 2014-04-15 |
| 8669180 | Semiconductor device with self aligned end-to-end conductive line structure and method of forming the same | Chia-Ying Lee | 2014-03-11 |
| 8633108 | Dual damascene process | Chia-Ying Lee | 2014-01-21 |
| 8415799 | Dual damascene interconnect in hybrid dielectric | Yi-Nien Su, Hun-Jan Tao | 2013-04-09 |
| 7968506 | Wet cleaning stripping of etch residue after trench and via opening formation in dual damascene process | Chun-Li Chou, Syun-Ming Jang, Chih-Yuan Ting | 2011-06-28 |
| 7875547 | Contact hole structures and contact structures and fabrication methods thereof | Ju-Wang Hsu, Yi-Nien Su, Peng-Fu Hsu, Hun-Jan Tao | 2011-01-25 |
| 7598176 | Method for photoresist stripping and treatment of low-k dielectric material | Jang-Shiang Tsai, Yi-Nien Su, Chung-Chi Ko, Peng-Fu Hsu, Hun-Jan Tao | 2009-10-06 |
| 7400401 | Measuring low dielectric constant film properties during processing | Jang-Shiang Tsai, Peng-Fu Hsu, Baw-Ching Perng, Ju-Wang Hsu, Yi-Nien Su +1 more | 2008-07-15 |
| 7378308 | CMOS devices with improved gap-filling | Ju-Wang Hsu, Chih-Hsin Ko, Baw-Ching Perng, Syun-Ming Jang | 2008-05-27 |
| 7341935 | Alternative interconnect structure for semiconductor devices | Ju-Wang Hsu, Yi-Chun Huang | 2008-03-11 |
| 7271448 | Multiple gate field effect transistor structure | Ju-Wang Hsu, Hun-Jan Tao, Chang-Yun Chang, Zhong Tang Xuan, Sheng-Da Liu | 2007-09-18 |
| 7256498 | Resistance-reduced semiconductor device and methods for fabricating the same | Yi-Chun Huang, Ju-Wang Hsu | 2007-08-14 |
| 7241674 | Method of forming silicided gate structure | Bor-Wen Chan, Hun-Jan Tao | 2007-07-10 |
| 7208331 | Methods and structures for critical dimension and profile measurement | Wen-Chih Chiou, Peng-Fu Hsu, Baw-Ching Perng, Hun-Jan Tao, Chia-Jen Chen | 2007-04-24 |
| 7196002 | Method of making dual damascene with via etch through | Yi-Nien Su, Yi-Chen Huang | 2007-03-27 |
| 7179701 | Transistor with high dielectric constant gate and method for forming the same | Ju-Wang Hsu, Ju-Chien Chiang | 2007-02-20 |
| 7094689 | Air gap interconnect structure and method thereof | Yi-Nien Su | 2006-08-22 |
| 7074727 | Process for improving dielectric properties in low-k organosilicate dielectric material | Peng-Fu Hsu, Yung-Cheng Lu, Hun-Jan Tao, Yuan-Hung Chiu | 2006-07-11 |
| 7029992 | Low oxygen content photoresist stripping process for low dielectric constant materials | Yi-Nien Su, Jang-Shiang Tsai, Chen-Nan Yeh, Hun-Jan Tao | 2006-04-18 |
| 7015133 | Dual damascene structure formed of low-k dielectric materials | Yi-Nien Su | 2006-03-21 |
| 6790770 | Method for preventing photoresist poisoning | Chao-Cheng Chen, Jen-Cheng Liu | 2004-09-14 |
| 6383943 | Process for improving copper fill integrity | Chao-Cheng Chen, Jen-Cheng Liu, Chia-Shiung Tsai, Bor-Shyang Lin | 2002-05-07 |
| 6297168 | Edge defect inhibited trench etch plasma etch method | Jen-Cheng Liu, Chao-Cheng Chen, Li-Chi Chao, Chia-Shia Tsai | 2001-10-02 |