Issued Patents All Time
Showing 1,726–1,750 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7723226 | Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio | Yung-Cheng Lu, Pei-Ren Jeng, Chia-Cheng Chou, Keng-Chu Lin, Chung-Chi Ko +2 more | 2010-05-25 |
| 7682963 | Air gap for interconnect application | Hai-Ching Chen, Sunil Kumar Singh, Tien-I Bao, Shau-Lin Shue | 2010-03-23 |
| 7667271 | Fin field-effect transistors | Yu-Rung Hsu, Chen-Nan Yeh | 2010-02-23 |
| 7651943 | Forming diffusion barriers by annealing copper alloy layers | Ming-Han Lee, Ming-Shih Yeh | 2010-01-26 |
| 7646097 | Bond pads and methods for fabricating the same | Shwang-Ming Jeng, Yung-Cheng Lu, Huilin Chang, Ting-Yu Shen, Yichi Liao | 2010-01-12 |
| 7642100 | Method and system for yield and productivity improvements in semiconductor processing | Lawrance Sheu, Yi-Li Hsiao, Francis Ko | 2010-01-05 |
| 7632734 | Method of fabricating semiconductor device | — | 2009-12-15 |
| 7629273 | Method for modulating stresses of a contact etch stop layer | Hung Chun Tsai, Hui-Lin Chang, Ting-Yu Shen, Yung-Cheng Lu | 2009-12-08 |
| 7629655 | Semiconductor device with multiple silicide regions | Cheng-Tung Lin, Chen-Nan Yeh | 2009-12-08 |
| 7611963 | Method for forming a multi-layer shallow trench isolation structure in a semiconductor device | Shu-Tine Yang, Chu-Yun Fu | 2009-11-03 |
| 7612405 | Fabrication of FinFETs with multiple fin heights | Chen-Nan Yeh, Chu-Yun Fu, Yu-Rung Hsu | 2009-11-03 |
| 7588995 | Method to create damage-free porous low-k dielectric films and structures resulting therefrom | Ching-Ya Wang | 2009-09-15 |
| 7582557 | Process for low resistance metal cap | Chien-Hsueh Shih | 2009-09-01 |
| 7564136 | Integration scheme for Cu/low-k interconnects | Ming-Ling Yeh, Keng-Chu Lin, Tien-I Bao, Shwang-Ming Cheng | 2009-07-21 |
| 7560785 | Semiconductor device having multiple fin heights | Chen-Nan Yeh, Yu-Rung Hsu | 2009-07-14 |
| 7514348 | Sidewall coverage for copper damascene filling | Shau-Lin Shue, Mei-Yun Wang | 2009-04-07 |
| 7482265 | UV curing of low-k porous dielectrics | I-I Chen, Tien-I Bao, Shwang-Ming Cheug | 2009-01-27 |
| 7465676 | Method for forming dielectric film to improve adhesion of low-k film | Fang Wen Tsai, I-I Chen, Zhen-Cheng Wu, Chih-Lung Lin, Tien-I Bao +1 more | 2008-12-16 |
| 7466028 | Semiconductor contact structure | Wen-Chih Chiou, Hung-Jung Tu, Weng-Jin Wu | 2008-12-16 |
| 7446034 | Process for making a metal seed layer | Chien-Hsueh Shih | 2008-11-04 |
| 7418982 | Substrate carrier and facility interface and apparatus including same | Yi-Li Hsiao | 2008-09-02 |
| 7354856 | Method for forming dual damascene structures with tapered via portions and improved performance | Ming-Shih Yeh, Ming-Hsing Tsai, Shau-Lin Shue | 2008-04-08 |
| 7329956 | Dual damascene cleaning method | Ching-Ya Wang | 2008-02-12 |
| 7314828 | Repairing method for low-k dielectric materials | Keng-Chu Lin, Ching-Ya Wang, Chia-Cheng Chou, Tien-I Bao, Shwang-Ming Cheng | 2008-01-01 |
| 7282450 | Sidewall coverage for copper damascene filling | Shau-Lin Shue, Mei-Yun Wang | 2007-10-16 |