| 11237210 |
Layout-aware test pattern generation and fault detection |
Alodeep Sanyal, Girish A. Patankar, Salvatore Talluto |
2022-02-01 |
$133,230,000 |
| 10621298 |
Automatically generated schematics and visualization |
Anshuman Chandra, Subramanian Chebiyam |
2020-04-14 |
$31,679,000 |
| 10605863 |
Mapping physical shift failures to scan cells for detecting physical faults in integrated circuits |
Subhadip Kundu, Parthajit Bhattacharya |
2020-03-31 |
$25,306,000 |
| 10445225 |
Command coverage analyzer |
Chandramouli Gopalakrishnan, Subramanian Chebiyam, Neeraj Surana, Santosh Kulkarni |
2019-10-15 |
|
| 10254343 |
Layout-aware test pattern generation and fault detection |
Alodeep Sanyal, Girish A. Patankar, Salvatore Talluto |
2019-04-09 |
$14,124,000 |
| 10203370 |
Scheme for masking output of scan chains in test circuit |
Jyotirmoy Saikia |
2019-02-12 |
$9,923,000 |
| 10067187 |
Handling of undesirable distribution of unknown values in testing of circuit using automated test equipment |
Anshuman Chandra, Subramanian Chebiyam, Jyotirmoy Saikia, Parthajit Bhattacharya |
2018-09-04 |
$28,619,000 |
| 9588179 |
Scheme for masking output of scan chains in test circuit |
Jyotirmoy Saikia |
2017-03-07 |
$18,743,000 |
| 9568550 |
Identifying failure indicating scan test cells of a circuit-under-test |
Subhadip Kundu, Parthajit Bhattacharya |
2017-02-14 |
$9,620,000 |
| 9417287 |
Scheme for masking output of scan chains in test circuit |
Anshuman Chandra, Subramanian Chebiyam, Jyotirmoy Saikia, Parthajit Bhattacharya |
2016-08-16 |
$9,352,000 |
| 9411014 |
Reordering or removal of test patterns for detecting faults in integrated circuit |
Sushovan Podder, Parthajit Bhattacharya |
2016-08-09 |
$32,719,000 |
| 9342439 |
Command coverage analyzer |
Chandramouli Gopalakrishnan, Subramanian Chebiyam, Neeraj Surana, Santosh Kulkarni |
2016-05-17 |
$10,026,000 |
| 9329235 |
Localizing fault flop in circuit by using modified test pattern |
Parthajit Bhattacharya |
2016-05-03 |
$27,976,000 |
| 9239897 |
Hierarchical testing architecture using core circuit with pseudo-interfaces |
Subramanian Chebiyam, Santosh Kulkarni, Anshuman Chandra |
2016-01-19 |
$23,563,000 |
| 8954918 |
Test design optimizer for configurable scan architectures |
Jyotirmoy Saikia, Rajesh Uppuluri, Pramod Notiyath, Tammy Fernandes, Santosh Kulkarni +1 more |
2015-02-10 |
$10,739,000 |
| 8660818 |
Systemic diagnostics for increasing wafer yield |
Mallika Kapur, Maya Kapur |
2014-02-25 |
$4,584,000 |
| 8584073 |
Test design optimizer for configurable scan architectures |
Jyotirmoy Saikia, Rajesh Uppuluri, Pramod Notiyath, Tammy Fernandes, Santosh Kulkarni +1 more |
2013-11-12 |
$9,030,000 |
| 8521464 |
Accelerating automatic test pattern generation in a multi-core computing environment via speculatively scheduled sequential multi-level parameter value optimization |
Ashwin Kumar, Ramakrishnan Balasubramanian, Rajesh Uppuluri, Jyotirmoy Saikia, Parthajit Bhattacharya +1 more |
2013-08-27 |
$3,619,000 |
| 8479067 |
Test architecture including cyclical cache chains, selective bypass scan chain segments, and blocking circuitry |
Anshuman Chandra, Jyotirmoy Saikia |
2013-07-02 |
$2,665,000 |
| 8065651 |
Implementing hierarchical design-for-test logic for modular circuit design |
Anshuman Chandra, Yasunari Kanzawa, Jyotirmoy Saikia |
2011-11-22 |
$2,136,000 |
| 7900105 |
Dynamically reconfigurable shared scan-in test architecture |
Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala +1 more |
2011-03-01 |
$2,192,000 |
| 7836368 |
Dynamically reconfigurable shared scan-in test architecture |
Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala +1 more |
2010-11-16 |
$2,454,000 |
| 7836367 |
Dynamically reconfigurable shared scan-in test architecture |
Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala +1 more |
2010-11-16 |
$2,454,000 |
| 7814444 |
Scan compression circuit and method of design therefor |
Peter Wohl, John A. Waicukauski, Sanjay Ramnath, Thomas W. Williams |
2010-10-12 |
$7,272,000 |
| 7797601 |
Slack-based transition-fault testing |
Tom W. Williams, Cyrus Hay |
2010-09-14 |
$2,885,000 |
