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USPTO Patent Rankings Data through Dec 31, 2025
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Anshuman Chandra — 7 Patents

SYSynopsys: 6 patents #194 of 2,302Top 9%
TSMC: 1 patents #8,466 of 12,232Top 70%
Sunnyvale, CA: #3,819 of 14,302 inventorsTop 30%
California: #83,669 of 386,348 inventorsTop 25%
Overall (All Time): #680,018 of 4,157,543Top 20%
7 Patents All Time
Anshuman Chandra has been granted 7 US patents while listed as an inventor at Synopsys. The first was granted in 2011 and the most recent in August 2024. Anshuman Chandra ranks #680,018 of 4,157,543 US inventors in our database (top 16.4%). Patent records list Anshuman Chandra in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12066490 Wrapper cell design and built-in self-test architecture for 3DIC test and diagnosis Sandeep Kumar Goel 2024-08-20 $10,659,000
10621298 Automatically generated schematics and visualization Subramanian Chebiyam, Rohit Kapur 2020-04-14 $31,679,000
10067187 Handling of undesirable distribution of unknown values in testing of circuit using automated test equipment Subramanian Chebiyam, Jyotirmoy Saikia, Parthajit Bhattacharya, Rohit Kapur 2018-09-04 $28,619,000
9417287 Scheme for masking output of scan chains in test circuit Subramanian Chebiyam, Jyotirmoy Saikia, Parthajit Bhattacharya, Rohit Kapur 2016-08-16 $9,352,000
9239897 Hierarchical testing architecture using core circuit with pseudo-interfaces Subramanian Chebiyam, Santosh Kulkarni, Rohit Kapur 2016-01-19 $23,563,000
8479067 Test architecture including cyclical cache chains, selective bypass scan chain segments, and blocking circuitry Jyotirmoy Saikia, Rohit Kapur 2013-07-02 $2,665,000
8065651 Implementing hierarchical design-for-test logic for modular circuit design Rohit Kapur, Yasunari Kanzawa, Jyotirmoy Saikia 2011-11-22 $2,136,000