| 12320839 |
Distributed test pattern generation and synchronization |
Khader S. Abdel-Hafez, Michael Dylan Dsouza |
2025-06-03 |
|
| 12277372 |
Multi-cycle test generation and source-based simulation |
John A. Waicukauski |
2025-04-15 |
|
| 12117488 |
Multiple clock and clock cycle selection for x-tolerant logic built in self test (XLBIST) |
John A. Waicukauski |
2024-10-15 |
$112,035,000 |
| 11422186 |
Per-shift X-tolerant logic built-in self-test |
John A. Waicukauski |
2022-08-23 |
$112,647,000 |
| 10908213 |
Reducing X-masking effect for linear time compactors |
Emil Gizdarski, John A. Waicukauski |
2021-02-02 |
$123,807,000 |
| 10346557 |
Increasing compression by reducing padding patterns |
John A. Waicukauski |
2019-07-09 |
$14,040,000 |
| 9404972 |
Diagnosis and debug with truncated simulation |
John A. Waicukauski, Emil Gizdarski, Wolfgang Meyer, Andrea Costa |
2016-08-02 |
$7,962,000 |
| 9171123 |
Diagnosis and debug using truncated simulation |
John A. Waicukauski, Emil Gizdarski, Wolfgang Meyer, Andrea Costa |
2015-10-27 |
$3,619,000 |
| 9157961 |
Two-level compression through selective reseeding |
John A. Waicukauski, Frederic J. Neuveux, Gregory A. Maston |
2015-10-13 |
$21,059,000 |
| 9152752 |
Increasing PRPG-based compression by delayed justification |
John A. Waicukauski |
2015-10-06 |
$5,269,000 |
| 8645780 |
Fully X-tolerant, very high scan compression scan test systems and techniques |
John A. Waicukauski, Frederic J. Neuveux |
2014-02-04 |
$6,201,000 |
| 8549372 |
ATPG and compression by using majority gates |
John A. Waicukauski |
2013-10-01 |
$3,560,000 |
| 8464115 |
Fully X-tolerant, very high scan compression scan test systems and techniques |
John A. Waicukauski, Frederic J. Neuveux |
2013-06-11 |
$3,959,000 |
| 8429473 |
Increasing PRPG-based compression by delayed justification |
John A. Waicukauski |
2013-04-23 |
$5,285,000 |
| 7979763 |
Fully X-tolerant, very high scan compression scan test systems and techniques |
John A. Waicukauski, Frederic J. Neuveux |
2011-07-12 |
$5,018,000 |
| 7958472 |
Increasing scan compression by using X-chains |
John A. Waicukauski, Frederic J. Neuveux, Yasunari Kanzawa |
2011-06-07 |
$5,504,000 |
| 7882410 |
Launch-on-shift support for on-chip-clocking |
Timothy Ayres, John A. Waicukauski |
2011-02-01 |
$3,024,000 |
| 7823034 |
Pipeline of additional storage elements to shift input/output data of combinational scan compression circuit |
John A. Waicukauski, Frederic J. Neuveux |
2010-10-26 |
$7,257,000 |
| 7814444 |
Scan compression circuit and method of design therefor |
John A. Waicukauski, Sanjay Ramnath, Rohit Kapur, Thomas W. Williams |
2010-10-12 |
$7,272,000 |
| 7237162 |
Deterministic BIST architecture tolerant of uncertain scan chain outputs |
John A. Waicukauski |
2007-06-26 |
$4,039,000 |
| 6993694 |
Deterministic bist architecture including MISR filter |
Rohit Kapur, Thomas W. Williams, Tony Taylor, John A. Waicukauski |
2006-01-31 |
$18,744,000 |
| 6959272 |
Method and system for generating an ATPG model of a memory from behavioral descriptions |
John A. Waicukauski, Timothy G. Hunkler |
2005-10-25 |
$14,571,000 |
| 6950974 |
Efficient compression and application of deterministic patterns in a logic BIST architecture |
John A. Waicukauski, Thomas W. Williams |
2005-09-27 |
$5,072,000 |
| 6807646 |
System and method for time slicing deterministic patterns for reseeding in logic built-in self-test |
Thomas W. Williams, John A. Waicukauski, Rohit Kapur |
2004-10-19 |
$9,183,000 |
| 6453437 |
Method and system for performing transition fault simulation along long circuit paths for high-quality automatic test pattern generation |
Rohit Kapur, Thomas W. Williams, John A. Waicukauski |
2002-09-17 |
$29,558,000 |
