Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11900042 | Stochastic-aware lithographic models for mask synthesis | Yudhishthir Prasad Kandel, Ulrich Welling, Ulrich Klostermann, Zachary Adam Levinson | 2024-02-13 |
| 8370773 | Method and apparatus for designing an integrated circuit using inverse lithography technology | Robert Boone, Yves Rody | 2013-02-05 |
| 8312394 | Method and apparatus for determining mask layouts for a spacer-is-dielectric self-aligned double-patterning process | Yonchan Ban | 2012-11-13 |
| 8175737 | Method and apparatus for designing and integrated circuit | Robert Boone, James E. Vasek, William L. Wilkinson, Christophe Couderc | 2012-05-08 |
| 7962868 | Method for forming a semiconductor device using optical proximity correction for the optical lithography | Robert Boone, Karl Wimmer, Christian Gardin | 2011-06-14 |
| 7935547 | Method of patterning a layer using a pellicle | Kyle Patterson, Sergei Postnikov | 2011-05-03 |
| 7284231 | Layout modification using multilayer-based constraints | Robert Boone, Mehul D. Shroff, Kirk Strozewski, Chi-Min Yuan, Jason T. Porter | 2007-10-16 |
| 6989229 | Non-resolving mask tiling method for flare reduction | Jonathan Cobb, William L. Wilkinson | 2006-01-24 |
| 6933227 | Semiconductor device and method of forming the same | Olubunmi O. Adetutu | 2005-08-23 |
| 6818362 | Photolithography reticle design | Robert Boone, Lloyd C. Litt, Wei E. Wu | 2004-11-16 |
| 6783904 | Lithography correction method and device | Kirk Strozewski, Marc J. Olivares, Chi-Min Yuan | 2004-08-31 |
| 6649452 | Method for manufacturing a lithographic reticle for transferring an integrated circuit design to a semiconductor wafer | William L. Wilkinson, Cesar M. Garza | 2003-11-18 |
| 6294820 | Metallic oxide gate electrode stack having a metallic gate dielectric metallic gate electrode and a metallic arc layer | Olubunmi O. Adetutu, Christopher C. Hobbs, Yolanda Musgrove, Yeong-Jyh T. Lii | 2001-09-25 |
| 6287951 | Process for forming a combination hardmask and antireflective layer | Christopher D. Pettinato, Wayne Clark, Stanley M. Filipiak, Yeong-Jyh T. Lii | 2001-09-11 |
| 6174810 | Copper interconnect structure and method of formation | Rabiul Islam, Avgerinos V. Gelatos, Stanley M. Filipiak, Ramnath Venkatraman | 2001-01-16 |
| 6004850 | Tantalum oxide anti-reflective coating (ARC) integrated with a metallic transistor gate electrode and method of formation | Olubunmi O. Adetutu, Christopher C. Hobbs, Yolanda Musgrove, Yeong-Jyh T. Lii | 1999-12-21 |
| 5958635 | Lithographic proximity correction through subset feature modification | Alfred J. Reich, Hak-Lay Chuang, Michael E. Kling, Paul G. Y. Tsui, James N. Conner | 1999-09-28 |
| 5920487 | Two dimensional lithographic proximity correction using DRC shape functions | Alfred J. Reich, Warren D. Grobman, Bernard J. Roman, Clyde Browning, Michael E. Kling | 1999-07-06 |
| 5900340 | One dimensional lithographic proximity correction using DRC shape functions | Alfred J. Reich, Michael E. Kling, Warren D. Grobman, Bernard J. Roman | 1999-05-04 |
| 5849440 | Process for producing and inspecting a lithographic reticle and fabricating semiconductor devices using same | Michael E. Kling, Alfred J. Reich, Chong-Cheng Fu, James Morrow | 1998-12-15 |
| 5827625 | Methods of designing a reticle and forming a semiconductor device therewith | Michael E. Kling, Bernard J. Roman, Alfred J. Reich | 1998-10-27 |
| 5741626 | Method for forming a dielectric tantalum nitride layer as an anti-reflective coating (ARC) | Ajay Jain | 1998-04-21 |