Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412019 | Method and system for latch-up prevention | Po-Chia Lai, Kuo-Ji Chen, Wen-Hao Chen, Wun-Jie Lin, Yu-Ti Su +4 more | 2025-09-09 |
| 12174440 | Photonics package integration | Stefan Rusu, Nick Samra | 2024-12-24 |
| 11687135 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2023-06-27 |
| 11615227 | Method and system for latch-up prevention | Po-Chia Lai, Kuo-Ji Chen, Wen-Hao Chen, Wun-Jie Lin, Yu-Ti Su +4 more | 2023-03-28 |
| 11460651 | Photonics package integration | Stefan Rusu, Nick Samra | 2022-10-04 |
| 11157052 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2021-10-26 |
| 11094682 | Package structure and method of fabricating the same | Chuei-Tang Wang, Stefan Rusu, Weiwei Song | 2021-08-17 |
| 10872190 | Method and system for latch-up prevention | Po-Chia Lai, Kuo-Ji Chen, Wen-Hao Chen, Wun-Jie Lin, Yu-Ti Su +4 more | 2020-12-22 |
| 10823921 | Photonics package integration | Stefan Rusu, Nick Samra | 2020-11-03 |
| 10429913 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2019-10-01 |
| 10409346 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2019-09-10 |
| 10146283 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2018-12-04 |
| 9823719 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2017-11-21 |
| 7992024 | Firewall/isolation cells for ultra low power products | Michael C. Phillips | 2011-08-02 |
| 7196923 | Bitcell layout | Joseph Hong, Subodh Annojvala, Lloyd Briggs | 2007-03-27 |
| 7154770 | Bitcell having a unity beta ratio | — | 2006-12-26 |
| 7139189 | State-retentive mixed register file array | Joseph Hong | 2006-11-21 |
| 6174810 | Copper interconnect structure and method of formation | Avgerinos V. Gelatos, Kevin Lucas, Stanley M. Filipiak, Ramnath Venkatraman | 2001-01-16 |