Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8175737 | Method and apparatus for designing and integrated circuit | Kevin Lucas, Robert Boone, William L. Wilkinson, Christophe Couderc | 2012-05-08 |
| 7670760 | Treatment for reduction of line edge roughness | Jinmiao J. Shen, Jonathan Cobb, William D. Darlington, Brian Fisher, Mark D. Hall +2 more | 2010-03-02 |
| 7288447 | Semiconductor device having trench isolation for differential stress and method therefor | Jian Chen, Thien T. Nguyen, Michael D. Turner | 2007-10-30 |
| 7276406 | Transistor structure with dual trench for optimized stress effect and method therefor | Jian Chen, Michael D. Turner | 2007-10-02 |
| 7157377 | Method of making a semiconductor device using treated photoresist | Cesar M. Garza, William D. Darlington, Stanley M. Filipiak | 2007-01-02 |