TC

Tien-Jen Cheng

IBM: 31 patents #3,235 of 70,183Top 5%
Samsung: 3 patents #30,683 of 75,807Top 45%
AM AMD: 1 patents #5,683 of 9,279Top 65%
CM Chartered Semiconductor Manufacturing: 1 patents #419 of 840Top 50%
EN Engelhard: 1 patents #271 of 518Top 55%
Infineon Technologies Ag: 1 patents #4,439 of 7,486Top 60%
Overall (All Time): #103,421 of 4,157,543Top 3%
34
Patents All Time

Issued Patents All Time

Showing 1–25 of 34 patents

Patent #TitleCo-InventorsDate
9673176 Metal to metal bonding for stacked (3D) integrated circuits Mukta G. Farooq, John A. Fitzsimmons 2017-06-06
9666563 Metal to metal bonding for stacked (3D) integrated circuits Mukta G. Farooq, John A. Fitzsimmons 2017-05-30
9653431 Metal to metal bonding for stacked (3D) integrated circuits Mukta G. Farooq, John A. Fitzsimmons 2017-05-16
9653432 Metal to metal bonding for stacked (3D) integrated circuits Mukta G. Farooq, John A. Fitzsimmons 2017-05-16
9515051 Metal to metal bonding for stacked (3D) integrated circuits Mukta G. Farooq, John A. Fitzsimmons 2016-12-06
9017486 Deposition chamber cleaning method including stressed cleaning layer Zhengwen Li, Keith Kwong Hon Wong 2015-04-28
9017487 Deposition chamber cleaning method including stressed cleaning layer Zhengwen Li, Keith Kwong Hon Wong 2015-04-28
8916448 Metal to metal bonding for stacked (3D) integrated circuits Mukta G. Farooq, John A. Fitzsimmons 2014-12-23
8444868 Method for removing copper oxide layer Stephan Grunow, Zhengwen Li, Huilong Zhu 2013-05-21
8415252 Selective copper encapsulation layer deposition Abhishek Dube, Zhengwen Li, Huilong Zhu 2013-04-09
8384219 Semiconductor having interconnects with improved mechanical properties by insertion of nanoparticles Junjing Bao, Naftali E. Lustig 2013-02-26
8373273 Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby Hyeok-Sang Oh, Woo Jin Jang, Bum Ki Moon, Ji-Hong Choi, Minseok Oh 2013-02-12
8232200 Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby Hyeok-Sang Oh, Woo Jin Jang, Bum Ki Moon, Ji-Hong Choi, Minseok Oh 2012-07-31
8129269 Method of improving mechanical properties of semiconductor interconnects with nanoparticles Junjing Bao, Naftali E. Lustig 2012-03-06
8105937 Conformal adhesion promoter liner for metal interconnects Zhengwen Li, Keith Kwong Hon Wong, Huilong Zhu 2012-01-31
8026166 Interconnect structures comprising capping layers with low dielectric constants and methods of making the same Griselda Bonilla, Lawrence A. Clevenger, Stephan Grunow, Chao-Kun Hu, Roger A. Quon +5 more 2011-09-27
7923836 BLM structure for application to copper pad Mukta G. Farooq, Roger A. Quon 2011-04-12
7767575 Forming robust solder interconnect structures by reducing effects of seed layer underetching Kamalesh K. Srivastava, Subhash L. Shinde, Sarah H. Knickerbocker, Roger A. Quinn, William E. Sablinski +3 more 2010-08-03
7572726 Method of forming a bond pad on an I/C chip and resulting structure Julie C. Biggs, David E. Eichstadt, Lisa A. Fanti, Jonathan H. Griffith, Randolph F. Knarr +6 more 2009-08-11
7566649 Compressible films surrounding solder connectors William E. Bernier, Marie Cole, David E. Eichstadt, Mukta G. Farooq, John A. Fitzsimmons +4 more 2009-07-28
7473997 Method for forming robust solder interconnect structures by reducing effects of seed layer underetching Kamalesh K. Srivastava, Subhash L. Shinde, Sarah H. Knickerbocker, Roger A. Quon, William E. Sablinski +3 more 2009-01-06
7332821 Compressible films surrounding solder connectors William E. Bernier, Marie Cole, David E. Eichstadt, Mukta G. Farooq, John A. Fitzsimmons +4 more 2008-02-19
7144490 Method for selective electroplating of semiconductor device I/O pads using a titanium-tungsten seed layer David E. Eichstadt, Jonathan H. Griffith, Sarah H. Knickerbocker, Rosemary A. Previti-Kelly, Roger A. Quon +2 more 2006-12-05
6995084 Method for forming robust solder interconnect structures by reducing effects of seed layer underetching Kamalesh K. Srivastava, Subhash L. Shinde, Sarah H. Knickerbocker, Roger A. Quon, William E. Sablinski +3 more 2006-02-07
6995475 I/C chip suitable for wire bonding Julie C. Biggs, David E. Eichstadt, Lisa A. Fanti, Jonathan H. Griffith, Randolph F. Knarr +6 more 2006-02-07