Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7564118 | Chip and wafer integration process using vertical connections | H. Bernhard Pogge, Roy Yu, Chandrasekhar Narayan | 2009-07-21 |
| 7388277 | Chip and wafer integration process using vertical connections | H. Bernhard Pogge, Roy Yu, Chandrasekhar Narayan | 2008-06-17 |
| 7049697 | Process for making fine pitch connections between devices and structure made by the process | H. Bernhard Pogge, Roy Yu | 2006-05-23 |
| 6998327 | Thin film transfer join process and multilevel thin film module | Jeffrey B. Danielson, Balaram Ghosal, James Kuss, Matthew Oonk, Eric D. Perfecto +1 more | 2006-02-14 |
| 6864165 | Method of fabricating integrated electronic chip with an interconnect device | H. Bernhard Pogge, Roy Yu | 2005-03-08 |
| 6856025 | Chip and wafer integration process using vertical connections | H. Bernhard Pogge, Roy Yu, Chandrasekhar Narayan | 2005-02-15 |
| 6835589 | Three-dimensional integrated CMOS-MEMS device and process for making the same | H. Bernhard Pogge, Michel Despont, Ute Drechsler, Peter Vettiger, Roy Yu | 2004-12-28 |
| 6737297 | Process for making fine pitch connections between devices and structure made by the process | H. Bernhard Pogge, Roy Yu | 2004-05-18 |
| 6724203 | Full wafer test configuration using memory metals | Lewis S. Goldmann | 2004-04-20 |
| 6678949 | Process for forming a multi-level thin-film electronic packaging structure | Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann +6 more | 2004-01-20 |
| 6669833 | Process and apparatus for electroplating microscopic features uniformly across a large substrate | Suryanarayana Kaja, RongQing Yu | 2003-12-30 |
| 6640021 | Fabrication of a hybrid integrated circuit device including an optoelectronic chip | H. Bernhard Pogge, Roy Yu | 2003-10-28 |
| 6632314 | Method of making a lamination and surface planarization for multilayer thin film interconnect | RongQing Yu, Kimberley A. Kelly, Sung Kwon Kang, Sampath Purushothaman | 2003-10-14 |
| 6599778 | Chip and wafer integration process using vertical connections | H. Bernhard Pogge, Roy Yu, Chandrasekhar Narayan | 2003-07-29 |
| 6600224 | Thin film attachment to laminate using a dendritic interconnection | Donald S. Farquhar, Raymond T. Galasco, Sung Kwon Kang, Mark D. Poliks, Roy Yu | 2003-07-29 |
| 6448169 | Apparatus and method for use in manufacturing semiconductor devices | William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra +4 more | 2002-09-10 |
| 6444560 | Process for making fine pitch connections between devices and structure made by the process | H. Bernhard Pogge, Roy Yu | 2002-09-03 |
| 6444919 | Thin film wiring scheme utilizing inter-chip site surface wiring | Laertis Economikos, Mukta S. Farooq, Michael F. McAllister, Eric D. Perfecto, Keshav Prasad +3 more | 2002-09-03 |
| 6329609 | Method and structure to prevent distortion and expansion of organic spacer layer for thin film transfer-join technology | Suryanarayana Kaja, RongQing Yu | 2001-12-11 |
| 6323045 | Method and structure for top-to-bottom I/O nets repair in a thin film transfer and join process | Christopher Cline, Nancy Wagner Hannon, Thomas A. Wassick, Roy Yu | 2001-11-27 |
| 6281452 | Multi-level thin-film electronic packaging structure and related method | Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann +6 more | 2001-08-28 |
| 6149048 | Apparatus and method for use in manufacturing semiconductor devices | William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra +4 more | 2000-11-21 |
| 6099935 | Apparatus for providing solder interconnections to semiconductor and electronic packaging devices | William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra +4 more | 2000-08-08 |
| 6090633 | Multiple-plane pair thin-film structure and process of manufacture | Roy Yu, John R. Pennacchia, Harvey C. Hamel | 2000-07-18 |
| 5916451 | Minimal capture pads applied to ceramic vias in ceramic substrates | Eric D. Perfecto, Keshav Prasad, Gordon J. Robbins, Madhavan Swaminathan, George E. White | 1999-06-29 |