Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9177822 | Selective etching bath methods | Russell H. Arndt, Charles J. Taft | 2015-11-03 |
| 8394715 | Method of fabricating coaxial through-silicon via | Richard P. Volant, Mukta G. Farooq, Kevin S. Petrarca | 2013-03-12 |
| 8298435 | Selective etching bath methods | Russell H. Arndt, Charles J. Taft | 2012-10-30 |
| 8242604 | Coaxial through-silicon via | Richard P. Volant, Mukta G. Farooq, Kevin S. Petrarca | 2012-08-14 |
| 6448169 | Apparatus and method for use in manufacturing semiconductor devices | William Brearley, Laertis Economikos, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur G. Merryman +4 more | 2002-09-10 |
| 6203690 | Process of reworking pin grid array chip carriers | John P. Gauci, Krystyna W. Semkow, Renee L. Weisman | 2001-03-20 |
| 6149048 | Apparatus and method for use in manufacturing semiconductor devices | William Brearley, Laertis Economikos, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur G. Merryman +4 more | 2000-11-21 |
| 6099935 | Apparatus for providing solder interconnections to semiconductor and electronic packaging devices | William Brearley, Laertis Economikos, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur G. Merryman +4 more | 2000-08-08 |
| 6051119 | Plating structure for a pin grid array package | Kenneth R. Idler, Minkailu A Jalloh, Thomas A. Kelly, Emanuele F. Lopergolo | 2000-04-18 |
| 5869139 | Apparatus and method for plating pin grid array packaging modules | Glen N. Biggs, John Di Santis, Karen P. McLaughlin, Phillip W. Palmatier, Victor M. Vitek | 1999-02-09 |