Issued Patents All Time
Showing 426–450 of 462 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8835250 | FinFET trench circuit | Jonathan E. Faltermeier, Kangguo Cheng, Theodorus E. Standaert | 2014-09-16 |
| 8815668 | Preventing FIN erosion and limiting Epi overburden in FinFET structures by composite hardmask | Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2014-08-26 |
| 8815661 | MIM capacitor in FinFET structure | Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2014-08-26 |
| 8815670 | Preventing Fin erosion and limiting EPI overburden in FinFET structures by composite hardmask | Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2014-08-26 |
| 8816420 | MIM capacitor in finFET structure | Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2014-08-26 |
| 8766363 | Method and structure for forming a localized SOI finFET | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Kern Rim | 2014-07-01 |
| 8723262 | SOI FinFET with recessed merged fins and liner for enhanced stress coupling | Huiming Bu, Effendi Leobandung, Theodorus E. Standaert, Tenko Yamashita, Chun-Chen Yeh | 2014-05-13 |
| 8722494 | Dual gate finFET devices | Effendi Leobandung, Tenko Yamashita | 2014-05-13 |
| 8716797 | FinFET spacer formation by oriented implantation | Chang Kangguo, Bruce B. Doris, Johnathan E. Faltermeier | 2014-05-06 |
| 8703572 | Embeded DRAM cell structures with high conductance electrodes and methods of manufacture | Richard Q. Williams | 2014-04-22 |
| 8698318 | Superfilled metal contact vias for semiconductor devices | James J. Kelly, Balasubramanian S. Pranatharthi Haran, Soon-Cheon Seo, Tuan A. Vo | 2014-04-15 |
| 8679902 | Stacked nanowire field effect transistor | Tenko Yamashita, Chun-Chen Yeh | 2014-03-25 |
| 8673729 | finFET eDRAM strap connection structure | Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2014-03-18 |
| 8674476 | Anti-fuse device structure and electroplating circuit structure and method | Toshiharu Furukawa, William R. Tonti | 2014-03-18 |
| 8637931 | finFET with merged fins and vertical silicide | Andres Bryant, Huiming Bu, Wilfried E. Haensch, Effendi Leobandung, Chung-Hsun Lin +3 more | 2014-01-28 |
| 8592290 | Cut-very-last dual-EPI flow | Huiming Bu, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet, Shom Ponoth +3 more | 2013-11-26 |
| 8569152 | Cut-very-last dual-epi flow | Huiming Bu, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet, Shom Ponoth +3 more | 2013-10-29 |
| 8557657 | Retrograde substrate for deep trench capacitors | Wilfried E. Haensch, Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2013-10-15 |
| 8551313 | Method and apparatus for electroplating on soi and bulk semiconductor wafers | Eduard A. Cartier, Hariklia Deligianni, Rajarao Jammy, Vamsi K. Paruchuri | 2013-10-08 |
| 8513073 | Silicon germanium channel with silicon buffer regions for fin field effect transistor device | Tenko Yamashita, Chun-Chun Yeh | 2013-08-20 |
| 8507187 | Multi-exposure lithography employing a single anti-reflective coating layer | Willard E. Conley, Steven J. Holmes, David V. Horak | 2013-08-13 |
| 8455313 | Method for fabricating finFET with merged fins and vertical silicide | Andres Bryant, Huiming Bu, Wilfried E. Haensch, Effendi Leobandung, Chung-Hsun Lin +3 more | 2013-06-04 |
| 8445334 | SOI FinFET with recessed merged Fins and liner for enhanced stress coupling | Huiming Bu, Effendi Leobandung, Theodorus E. Standaert, Tenko Yamashita, Chun-Chen Yeh | 2013-05-21 |
| 8420464 | Spacer as hard mask scheme for in-situ doping in CMOS finFETs | Kangguo Cheng, Bruce B. Doris, Johnathan E. Faltermeier, Sivananda K. Kanakasabapathy, Hemant Adhikari | 2013-04-16 |
| 8377795 | Cut first methodology for double exposure double etch integration | Sivananda K. Kanakasabapathy, Balasubramanian S. Haran | 2013-02-19 |