Issued Patents All Time
Showing 26–50 of 87 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8981466 | Multilayer dielectric structures for semiconductor nano-devices | Alfred Grill, Seth L. Knupp, Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha | 2015-03-17 |
| 8926805 | Method and apparatus for electroplating on SOI and bulk semiconductor wafers | Veeraraghavan S. Basker, Eduard A. Cartier, Hariklia Deligianni, Rajarao Jammy | 2015-01-06 |
| 8753936 | Changing effective work function using ion implantation during dual work function metal gate integration | Michael P. Chudzik, Martin M. Frank, Herbert L. Ho, Mark J. Hurley, Rashmi Jha +3 more | 2014-06-17 |
| 8741757 | Replacement gate electrode with multi-thickness conductive metallic nitride layers | Hemanth Jagannathan | 2014-06-03 |
| 8680623 | Techniques for enabling multiple Vt devices using high-K metal gate stacks | Martin M. Frank, Arvind Kumar, Vijay Narayanan, Jeffrey W. Sleight | 2014-03-25 |
| 8658501 | Method and apparatus for flatband voltage tuning of high-k field effect transistors | Supratik Guha, Vijay Narayanan | 2014-02-25 |
| 8569844 | Metal gate CMOS with at least a single gate metal and dual gate dielectrics | Bruce B. Doris, Young-Hee Kim, Barry P. Linder, Vijay Narayanan | 2013-10-29 |
| 8551313 | Method and apparatus for electroplating on soi and bulk semiconductor wafers | Veeraraghavan S. Basker, Eduard A. Cartier, Hariklia Deligianni, Rajarao Jammy | 2013-10-08 |
| 8518766 | Method of forming switching device having a molybdenum oxynitride metal gate | Nestor A. Bojarczuk, Michael P. Chudzik, Matthew W. Copel, Supratik Guha, Richard A. Haight +2 more | 2013-08-27 |
| 8383483 | High performance CMOS circuits, and methods for fabricating same | John C. Arnold, Glenn A. Biery, Alessandro C. Callegari, Tze-Chiang Chen, Michael P. Chudzik +7 more | 2013-02-26 |
| 8309447 | Method for integrating multiple threshold voltage devices for CMOS | Kangguo Cheng, Bruce B. Doris, Lisa F. Edge, Balasubramanian S. Haran, Hemanth Jagannathan +1 more | 2012-11-13 |
| 8304836 | Structure and method to obtain EOT scaled dielectric stacks | Hemanth Jagannathan, Takashi Ando, Lisa F. Edge, Sufi Zafar, Changhwan Choi +2 more | 2012-11-06 |
| 8212322 | Techniques for enabling multiple Vt devices using high-K metal gate stacks | Martin M. Frank, Arvind Kumar, Vijay Narayanan, Jeffrey W. Sleight | 2012-07-03 |
| 8193051 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more | 2012-06-05 |
| 8187961 | Threshold adjustment for high-K gate dielectric CMOS | Bruce B. Doris, Eduard A. Cartier, Vijay Narayanan | 2012-05-29 |
| 8183642 | Gate effective-workfunction modification for CMOS | Dae-Gyu Park, Michael P. Chudzik, Rashmi Jha, Siddarth A. Krishnan, Naim Moumen +1 more | 2012-05-22 |
| 8097500 | Method and apparatus for fabricating a high-performance band-edge complementary metal-oxide-semiconductor device | Takashi Ando, Eduard A. Cartier, Changhwan Choi, Elizabeth A. Duch, Bruce B. Doris +3 more | 2012-01-17 |
| 8035173 | CMOS transistors with differential oxygen content high-K dielectrics | Huiming Bu, Eduard A. Cartier, Bruce B. Doris, Young-Hee Kim, Barry P. Linder +2 more | 2011-10-11 |
| 8030716 | Self-aligned CMOS structure with dual workfunction | Dae-Gyu Park, Michael P. Chudzik, Vijay Narayanan | 2011-10-04 |
| 7999323 | Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices | Eduard A. Cartier, Matthew W. Copel, Bruce B. Doris, Rajarao Jammy, Young-Hee Kim +3 more | 2011-08-16 |
| 7947549 | Gate effective-workfunction modification for CMOS | Dae-Gyu Park, Michael P. Chudzik, Rashmi Jha, Siddarth A. Krishnan, Naim Moumen +1 more | 2011-05-24 |
| 7944006 | Metal gate electrode stabilization by alloying | Veeraraghavan S. Basker, Hariklia Deligianni, Rajarao Jammy, Lubomyr T. Romankiw | 2011-05-17 |
| 7928514 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more | 2011-04-19 |
| 7919379 | Dielectric spacer removal | Eduard A. Cartier, Rashmi Jha, Sivananda K. Kanakasabapathy, Xi Li, Renee T. Mo +6 more | 2011-04-05 |
| 7880243 | Simple low power circuit structure with metal gate and high-k dielectric | Bruce B. Doris, Eduard A. Cartier, Barry P. Linder, Vijay Narayanan | 2011-02-01 |