Issued Patents All Time
Showing 201–223 of 223 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8008669 | Programmable anti-fuse structure with DLC dielectric layer | Chih-Chao Yang, David V. Horak, Takeshi Nogami | 2011-08-30 |
| 8003524 | Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement | Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Terry A. Spooner | 2011-08-23 |
| 8003520 | Air gap structure having protective metal silicide pads on a metal feature | Griselda Bonilla, Daniel C. Edelstein, Satyanarayana V. Nitta, Takeshi Nogami, David L. Rath +1 more | 2011-08-23 |
| 7977032 | Method to create region specific exposure in a layer | Christos D. Dimitrakopoulos, Daniel C. Edelstein, Vincent J. McGahay, Satyanarayana V. Nitta, Kevin S. Petrarca +1 more | 2011-07-12 |
| 7960276 | Conductor-dielectric structure and method for fabricating | David L. Rath, Chih-Chao Yang, Keith Kwong Hon Wong | 2011-06-14 |
| 7952146 | Grain growth promotion layer for semiconductor interconnect structures | Chih-Chao Yang | 2011-05-31 |
| 7943480 | Sub-lithographic dimensioned air gap formation and related structure | Daniel C. Edelstein, Nicholas C. M. Fuller, David V. Horak, Elbert E. Huang, Wai-Kin Li +2 more | 2011-05-17 |
| 7928570 | Interconnect structure | David V. Horak, Takeshi Nogami, Chih-Chao Yang | 2011-04-19 |
| 7892968 | Via gouging methods and related semiconductor structure | Shyng-Tsong Chen, Steven J. Holmes, David V. Horak, Takeshi Nogami, Chih-Chao Yang | 2011-02-22 |
| 7888252 | Self-aligned contact | Johnathan E. Faltermeier, Stephan Grunow, Kangguo Cheng, Kevin S. Petrarca, Kaushik A. Kumar +2 more | 2011-02-15 |
| 7884477 | Air gap structure having protective metal silicide pads on a metal feature | Griselda Bonilla, Daniel C. Edelstein, Satyanarayana V. Nitta, Takeshi Nogami, David L. Rath +1 more | 2011-02-08 |
| 7790601 | Forming interconnects with air gaps | Samuel S. Choi, Lawrence A. Clevenger, Maxime Darnon, Daniel C. Edelstein, Satyanarayana V. Nitta +1 more | 2010-09-07 |
| 7709344 | Integrated circuit fabrication process using gas cluster ion beam etching | Shyng-Tsong Chen, John A. Fitzsimmons, Terry A. Spooner | 2010-05-04 |
| 7687877 | Interconnect structure with a mushroom-shaped oxide capping layer and method for fabricating same | Chih-Chao Yang, David V. Horak, Takeshi Nogami | 2010-03-30 |
| 7670497 | Oxidant and passivant composition and method for use in treating a microelectronic structure | John A. Fitzsimmons, David L. Rath, Michael Beck | 2010-03-02 |
| 7666787 | Grain growth promotion layer for semiconductor interconnect structures | Chih-Chao Yang | 2010-02-23 |
| 7531444 | Method to create air gaps using non-plasma processes to damage ILD materials | Christos D. Dimitrakopoulos, Daniel C. Edelstein, Vincent J. McGahay, Satyanarayana V. Nittta, Kevin S. Petrarca +1 more | 2009-05-12 |
| 7498254 | Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement | Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Terry A. Spooner | 2009-03-03 |
| 7402883 | Back end of the line structures with liner and noble metal layer | Chih-Chao Yang, Shyng-Tsong Chen, Terry A. Spooner | 2008-07-22 |
| 7341948 | Method of making a semiconductor structure with a plating enhancement layer | Steven S. Chen, John A. Fitzsimmons, Terry A. Spooner | 2008-03-11 |
| 7253098 | Maintaining uniform CMP hard mask thickness | Shyng-Tsong Chen, Kaushik A. Kumar, Stephen E. Greco, Terry A. Spooner, David L. Rath +1 more | 2007-08-07 |
| 7215006 | Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement | Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Terry A. Spooner | 2007-05-08 |
| 6832036 | Siloxane optical waveguides | Ramkrisha Ghoshal, Peter D. Persans, Navnit Agarwal, Joel L. Plawsky | 2004-12-14 |