Issued Patents All Time
Showing 151–175 of 360 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10546957 | Nanosheet FET including all-around source/drain contact | Chun Wing Yeung, Chen Zhang | 2020-01-28 |
| 10546788 | Dual channel FinFETs having uniform fin heights | Zhenxing Bi, Kangguo Cheng, Jie Yang | 2020-01-28 |
| 10541330 | Forming stacked nanowire semiconductor device | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-01-21 |
| 10541308 | Gate cut device fabrication with extended height gates | Kangguo Cheng, Andrew M. Greene, John R. Sporre | 2020-01-21 |
| 10541176 | Vertical silicon/silicon-germanium transistors with multiple threshold voltages | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2020-01-21 |
| 10541128 | Method for making VFET devices with ILD protection | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2020-01-21 |
| 10535755 | Closely packed vertical transistors with reduced contact resistance | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2020-01-14 |
| 10535754 | Method and structure for forming a vertical field-effect transistor | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2020-01-14 |
| 10535733 | Method of forming a nanosheet transistor | Kangguo Cheng, Choonghyun Lee, Juntao Li | 2020-01-14 |
| 10535567 | Methods and structures for forming uniform fins when using hardmask patterns | Kangguo Cheng, Yann Mignot, Choonghyun Lee | 2020-01-14 |
| 10522594 | Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element | Kangguo Cheng, Juntao Li, Choonghyun Lee | 2019-12-31 |
| 10522636 | Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor | Chun Wing Yeung, Chen Zhang, Huiming Bu, Kangguo Cheng | 2019-12-31 |
| 10522649 | Inverse T-shaped contact structures having air gap spacers | Kangguo Cheng, Choonghyun Lee, Juntao Li, Heng Wu | 2019-12-31 |
| 10516028 | Transistor with asymmetric spacers | Zhenxing Bi, Kangguo Cheng, Heng Wu | 2019-12-24 |
| 10510892 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy | 2019-12-17 |
| 10510885 | Transistor with asymmetric source/drain overlap | Kangguo Cheng, Heng Wu, Zhenxing Bi | 2019-12-17 |
| 10504793 | Hybrid-channel nano-sheet FETs | Zhenxing Bi, Kangguo Cheng, Wenyu Xu | 2019-12-10 |
| 10504794 | Self-aligned silicide/germanide formation to reduce external resistance in a vertical field-effect transistor | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2019-12-10 |
| 10497796 | Vertical transistor with reduced gate length variation | Kangguo Cheng, Juntao Li, Choonghyun Lee | 2019-12-03 |
| 10490447 | Airgap formation in BEOL interconnect structure using sidewall image transfer | Kangguo Cheng, Ekmini Anuja De Silva, Juntao Li, Yi Song | 2019-11-26 |
| 10490546 | Forming on-chip metal-insulator-semiconductor capacitor | Zhenxing Bi, Kangguo Cheng, Chen Zhang | 2019-11-26 |
| 10490667 | Three-dimensional field effect device | Huimei Zhou, Su Chen Fan, Shogo Mochizuki, Nicolas Loubet | 2019-11-26 |
| 10483382 | Tunnel transistor | Kangguo Cheng, Heng Wu, Zhenxing Bi | 2019-11-19 |
| 10460982 | Formation of semiconductor devices with dual trench isolations | Juntao Li, Kangguo Cheng, Choonghyun Lee | 2019-10-29 |
| 10453843 | Multiple finFET Formation with epitaxy separation | Kangguo Cheng, Juntao Li | 2019-10-22 |