Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10833267 | Structure and method to form phase change memory cell with self- align top electrode contact | Injo Ok, Myung-Hee Na, Balasubramanian Pranatharthiharan | 2020-11-10 |
| 10832945 | Techniques to improve critical dimension width and depth uniformity between features with different layout densities | Indira Seshadri, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Gauri Karve, Fee Li Lie +3 more | 2020-11-10 |
| 10803933 | Self-aligned high density and size adjustable phase change memory | Injo Ok, Myung-Hee Na, Balasubramanian Pranatharthiharan | 2020-10-13 |
| 10741756 | Phase change memory with a patterning scheme for tantalum nitride and silicon nitride layers | Injo Ok, Iqbal Rashid Saraf, Kevin W. Brew | 2020-08-11 |
| 10725454 | Mask process aware calibration using mask pattern fidelity inspections | Ravi K. Bonam, Michael M. Crouse, Derren N. Dunn | 2020-07-28 |
| 10622250 | Dielectric gap fill evaluation for integrated circuits | Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Ekmini Anuja De Silva, Gauri Karve +3 more | 2020-04-14 |
| 10600868 | FinFET gate cut after dummy gate removal | John R. Sporre, Siva Kanakasabapathy, Andrew M. Greene, Jeffrey C. Shearer | 2020-03-24 |
| 10573808 | Phase change memory with a dielectric bi-layer | Iqbal Rashid Saraf, Kevin W. Brew, Injo Ok, Robert L. Bruce | 2020-02-25 |
| 10546774 | Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Yann Mignot +2 more | 2020-01-28 |
| 10529569 | Self aligned pattern formation post spacer etchback in tight pitch configurations | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Nelson Felix, Sivananda K. Kanakasabapathy +2 more | 2020-01-07 |
| 10515894 | Enhanced self-alignment of vias for a semiconductor device | Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo | 2019-12-24 |
| 10395985 | Self aligned conductive lines with relaxed overlay | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Yann Mignot +2 more | 2019-08-27 |
| 10381348 | Structure and method for equal substrate to channel height between N and P fin-FETs | Lawrence A. Clevenger, Leigh Anne H. Clevenger, Mona A. Ebrish, Gauri Karve, Fee Li Lie +2 more | 2019-08-13 |
| 10361127 | Vertical transport FET with two or more gate lengths | Gauri Karve, Fee Li Lie, Indira Seshadri, Mona A. Ebrish, Leigh Anne H. Clevenger +1 more | 2019-07-23 |
| 10312140 | Dielectric gap fill evaluation for integrated circuits | Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Ekmini Anuja De Silva, Gauri Karve +3 more | 2019-06-04 |
| 10249533 | Method and structure for forming a replacement contact | Jeffrey C. Shearer, John R. Sporre, Hyung Joo Shin | 2019-04-02 |
| 10229854 | FinFET gate cut after dummy gate removal | John R. Sporre, Siva Kanakasabapathy, Andrew M. Greene, Jeffrey C. Shearer | 2019-03-12 |
| 10229910 | Separate N and P fin etching for reduced CMOS device leakage | Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Mona A. Ebrish, Gauri Karve +3 more | 2019-03-12 |
| 10211151 | Enhanced self-alignment of vias for asemiconductor device | Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo | 2019-02-19 |
| 10121661 | Self aligned pattern formation post spacer etchback in tight pitch configurations | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Nelson Felix, Sivananda K. Kanakasabapathy +2 more | 2018-11-06 |
| 10083864 | Self aligned conductive lines with relaxed overlay | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Yann Mignot +2 more | 2018-09-25 |
| 10056290 | Self-aligned pattern formation for a semiconductor device | Sean D. Burns, Lawrence A. Clevenger, Nelson Felix, Sivananda K. Kanakasabapathy, Christopher J. Penny | 2018-08-21 |
| 9991156 | Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Yann Mignot +2 more | 2018-06-05 |
| 9972533 | Aligning conductive vias with trenches | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Yann Mignot +2 more | 2018-05-15 |
| 9934970 | Self aligned pattern formation post spacer etchback in tight pitch configurations | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Nelson Felix, Sivananda K. Kanakasabapathy +2 more | 2018-04-03 |