Issued Patents All Time
Showing 151–175 of 283 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10134905 | Semiconductor device including wrap around contact, and method of forming the semiconductor device | Michael A. Guillorn | 2018-11-20 |
| 10134759 | Semiconductor device including groups of nanowires of different semiconductor materials and related methods | James Kuss | 2018-11-20 |
| 10134895 | Facet-free strained silicon transistor | Prasanna Khare, Qing Liu | 2018-11-20 |
| 10134899 | Facet-free strained silicon transistor | Prasanna Khare, Qing Liu | 2018-11-20 |
| 10109533 | Nanosheet devices with CMOS epitaxy and method of forming | Ruilong Xie, Cheng Chi, Pietro Montanini, Tenko Yamashita | 2018-10-23 |
| 10103174 | Semiconductor-on-insulator (SOI) device and related methods for making same using non-oxidizing thermal treatment | Pierre Morin, Qing Liu | 2018-10-16 |
| 10074575 | Integrating and isolating nFET and pFET nanosheet transistors on a substrate | Michael A. Guillorn, Muthumanickam Sankarapandian | 2018-09-11 |
| 10074577 | Silicon germanium and silicon fins on oxide from bulk wafer | Hong He, James Kuss, Junli Wang | 2018-09-11 |
| 10068908 | Method to form localized relaxed substrate by using condensation | Pierre Morin | 2018-09-04 |
| 10062690 | Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methods | Qing Liu, Prasanna Khare | 2018-08-28 |
| 10062783 | Silicon germanium fin channel formation | Hong He, Junli Wang | 2018-08-28 |
| 10043907 | Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer | Qing Liu | 2018-08-07 |
| 10043805 | Method to induce strain in finFET channels from an adjacent region | Pierre Morin | 2018-08-07 |
| 10043748 | Vertically integrated nanosheet fuse | Robin Hsin Kuo Chao, James J. Demarest | 2018-08-07 |
| 10038075 | Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon-germanium region | Stephane Allegret-Maret, Kangguo Cheng, Bruce B. Doris, Prasanna Khare, Qing Liu | 2018-07-31 |
| 10037922 | Co-integration of tensile silicon and compressive silicon germanium | Pierre Morin, Yann Mignot | 2018-07-31 |
| 10032912 | Semiconductor integrated structure having an epitaxial SiGe layer extending from silicon-containing regions formed between segments of oxide regions | Pierre Morin, Kangguo Cheng, Jody A. Fronheiser, Xiuyu Cai, Juntao Li +3 more | 2018-07-24 |
| 10026810 | Co-integration of silicon and silicon-germanium channels for nanosheet devices | Michael A. Guillorn, Isaac Lauer | 2018-07-17 |
| 10020398 | Stress induction in 3D device channel using elastic relaxation of high stress material | Kangguo Cheng, Xin Miao, Alexander Reznicek | 2018-07-10 |
| 9997352 | Polysilicon residue removal in nanosheet MOSFETs | Zhenxing Bi, Donald F. Canaperi, Thamarai S. Devarajan | 2018-06-12 |
| 9991351 | Method of making a semiconductor device using a dummy gate | Prasanna Khare | 2018-06-05 |
| 9991166 | Wimpy device by selective laser annealing | Kangguo Cheng, Xin Miao, Alexander Reznicek | 2018-06-05 |
| 9978678 | Vertically integrated nanosheet fuse | Robin Hsin Kuo Chao, James J. Demarest | 2018-05-22 |
| 9972684 | Compressive strain semiconductor substrates | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-05-15 |
| 9941355 | Co-integration of elastic and plastic relaxation on the same wafer | Stephen W. Bedell, Devendra K. Sadana | 2018-04-10 |