Issued Patents All Time
Showing 201–225 of 283 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9679780 | Polysilicon residue removal in nanosheet MOSFETs | Zhenxing Bi, Donald F. Canaperi, Thamarai S. Devarajan | 2017-06-13 |
| 9673222 | Fin isolation structures facilitating different fin isolation schemes | Ajey Poovannummoottil Jacob, Kangguo Cheng, Bruce B. Doris, Prasanna Khare, Rama Divakaruni | 2017-06-06 |
| 9660081 | Method to form localized relaxed substrate by using condensation | Pierre Morin | 2017-05-23 |
| 9660080 | Multi-layer strained channel FinFET | Pierre Morin | 2017-05-23 |
| 9640641 | Silicon germanium fin channel formation | Hong He, Junli Wang | 2017-05-02 |
| 9633911 | Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Qing Liu, Scott Luning | 2017-04-25 |
| 9633893 | Method to protect against contact related shorts on UTBB | Qing Liu, Shom Ponoth | 2017-04-25 |
| 9627245 | Methods of forming alternative channel materials on a non-planar semiconductor device and the resulting device | Ajey Poovannummoottil Jacob, Bruce B. Doris, Kangguo Cheng | 2017-04-18 |
| 9620506 | Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region | Qing Liu, Prasanna Khare, Stephane Allegret-Maret, Bruce B. Doris, Kangguo Cheng | 2017-04-11 |
| 9620507 | Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon-germanium region | Qing Liu, Prasanna Khare, Stephane Allegret-Maret, Bruce B. Doris, Kangguo Cheng | 2017-04-11 |
| 9601382 | Method for the formation of a FinFET device with epitaxially grown source-drain regions having a reduced leakage path | Stephane Monfray, Ronald K. Sampson | 2017-03-21 |
| 9601381 | Method for the formation of a finFET device with epitaxially grown source-drain regions having a reduced leakage path | Stephane Monfray, Ronald K. Sampson | 2017-03-21 |
| 9548361 | Method of using a sacrificial gate structure to make a metal gate FinFET transistor | Pierre Morin | 2017-01-17 |
| 9530777 | FinFETs of different compositions formed on a same substrate | Hong He, James Kuss | 2016-12-27 |
| 9520393 | Fully substrate-isolated FinFET transistor | Prasanna Khare | 2016-12-13 |
| 9502292 | Dual shallow trench isolation liner for preventing electrical shorts | Bruce B. Doris, Shom Ponoth, Prasanna Khare, Qing Liu, Maud Vinet | 2016-11-22 |
| 9466720 | Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer | Qing Liu | 2016-10-11 |
| 9466718 | Semiconductor device with fin and related methods | Pierre Morin | 2016-10-11 |
| 9461174 | Method for the formation of silicon and silicon-germanium fin structures for FinFET devices | Hong He, James Kuss | 2016-10-04 |
| 9460971 | Method to co-integrate oppositely strained semiconductor devices on a same substrate | Sylvain Maitrejean, Romain Wacquez | 2016-10-04 |
| 9437474 | Method for fabricating microelectronic devices with isolation trenches partially formed under active regions | Laurent Grenouillet, Yannick Le Tiec, Maud Vinet, Romain Wacquez | 2016-09-06 |
| 9437504 | Method for the formation of fin structures for FinFET devices | Prasanna Khare, Qing Liu, Balasubramanian Pranatharthiharan, Shom Ponoth | 2016-09-06 |
| 9418900 | Silicon germanium and silicon fins on oxide from bulk wafer | Hong He, James Kuss, Junli Wang | 2016-08-16 |
| 9419111 | Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methods | Qing Liu, Prasanna Khare | 2016-08-16 |
| 9406783 | Method to induce strain in finFET channels from an adjacent region | Pierre Morin | 2016-08-02 |