Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12198940 | Method for modifying the strain state of a block of a semiconducting material | Sylvain Maitrejean, Shay Reboh | 2025-01-14 |
| 11264479 | Process for producing FET transistors | Laurent Grenouillet, Maud Vinet | 2022-03-01 |
| 10879083 | Method for modifying the strain state of a block of a semiconducting material | Sylvain Maitrejean, Shay Reboh | 2020-12-29 |
| 10355207 | Method for forming a non-volatile memory cell, non-volatile memory cell formed according to said method and microelectronic device comprising such memory cells | Alexis Krakovinsky, Marc Bocquet, Jean Coignus, Vincenzo Della Marca, Jean-Michel PORTAL | 2019-07-16 |
| 9991892 | Electronic device having a physical unclonable function identifier | Jacques Fournier, Carlo Reita | 2018-06-05 |
| 9673329 | Method for manufacturing a fin MOS transistor | Yves Morand, Laurent Grenouillet, Yannick Le Tiec, Maud Vinet | 2017-06-06 |
| 9570340 | Method of etching a crystalline semiconductor material by ion implantation and then chemical etching based on hydrogen chloride | Laurent Grenouillet, Maud Vinet | 2017-02-14 |
| 9460971 | Method to co-integrate oppositely strained semiconductor devices on a same substrate | Nicolas Loubet, Sylvain Maitrejean | 2016-10-04 |
| 9437474 | Method for fabricating microelectronic devices with isolation trenches partially formed under active regions | Laurent Grenouillet, Yannick Le Tiec, Nicolas Loubet, Maud Vinet | 2016-09-06 |
| 9437475 | Method for fabricating microelectronic devices with isolation trenches partially formed under active regions | Maud Vinet, Sylvie Mignot | 2016-09-06 |
| 9396984 | Method of producing a microelectronic device in a monocrystalline semiconductor substrate with isolation trenches partially formed under an active region | Maud Vinet, Nicolas Loubet | 2016-07-19 |
| 9236478 | Method for manufacturing a fin MOS transistor | Yves Morand, Laurent Grenouillet, Yannick Le Tiec, Maud Vinet | 2016-01-12 |
| 9231062 | Method for treating the surface of a silicon substrate | Yannick Le Tiec, Laurent Grenouillet, Maud Vinet | 2016-01-05 |
| 9230991 | Method to co-integrate oppositely strained semiconductor devices on a same substrate | Nicolas Loubet, Sylvain Maitrejean | 2016-01-05 |
| 8987854 | Microelectronic device with isolation trenches extending under an active area | Maud Vinet, Laurent Grenouillet, Yannick Le Tiec | 2015-03-24 |
| 8954363 | Digital-to-analogue converter and neuromorphic circuit using such a converter | Rodolphe Heliot, Xavier Jehl, Marc Sanquer | 2015-02-10 |
| 8877618 | Method for producing a field effect transistor with a SiGe channel by ion implantation | Laurent Grenouillet, Maud Vinet, Yannick Le Tiec, Olivier Faynot | 2014-11-04 |
| 8652583 | Method for producing a three-dimensionally controlled surface coating in a cavity | Christophe Constancias, Philippe Coronel | 2014-02-18 |
| 8460978 | Method for manufacturing a transistor with parallel semiconductor nanofingers | Philippe Coronel, Jessy Bustos | 2013-06-11 |
| 8110460 | Method for producing stacked and self-aligned components on a substrate | Philippe Coronel, Vincent Destefanis, Jean-Michel Hartmann | 2012-02-07 |
| 7994008 | Transistor device with two planar gates and fabrication process | Philippe Coronel, Damien Lenoble, Robin Cerutti, Thomas Skotnicki | 2011-08-09 |
| 7803668 | Transistor and fabrication process | Philippe Coronel, Jessy Bustos | 2010-09-28 |
| 7420253 | Three-gate transistor structure | Philippe Coronel | 2008-09-02 |