Issued Patents All Time
Showing 1–25 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11239347 | Method for making a transistor of which the active region includes a semimetal material | Jean-Pierre Colinge | 2022-02-01 |
| 11121043 | Fabrication of transistors having stressed channels | Nicolas Posseme, Cyrille Le Royer | 2021-09-14 |
| 10658197 | Method for producing low-permittivity spacers | Nicolas Posseme, Maxime Garcia-Barros | 2020-05-19 |
| 10340361 | Forming of a MOS transistor based on a two-dimensional semiconductor material | Fabrice Nemouchi | 2019-07-02 |
| 10014183 | Method for patterning a thin film | Shay Reboh, Laurent Grenouillet | 2018-07-03 |
| 9978602 | Method of making a transistor | Heimanu Niebojewski, Maud Vinet | 2018-05-22 |
| 9935019 | Method of fabricating a transistor channel structure with uniaxial strain | Shay Reboh, Laurent Grenouillet, Frederic Milesi, Francois Rieutord | 2018-04-03 |
| 9911827 | SBFET transistor and corresponding fabrication process | Louis HUTIN, Julien BORREL, Fabrice Nemouchi | 2018-03-06 |
| 9911820 | Method for fabrication of a field-effect with reduced stray capacitance | Cyrille Le Royer, Frederic Boeuf, Laurent Grenouillet, Louis HUTIN | 2018-03-06 |
| 9899217 | Method for producing a strained semiconductor on insulator substrate | Shay Reboh, Hubert Moriceau | 2018-02-20 |
| 9853130 | Method of modifying the strain state of a semiconducting structure with stacked transistor channels | Sylvain Maitrejean, Emmanuel Augendre, Jean-Charles Barbe, Benoit Mathieu | 2017-12-26 |
| 9831319 | Transistor with MIS connections and fabricating process | Julien BORREL, Louis HUTIN, Fabrice Nemouchi, Heimanu Niebojewski | 2017-11-28 |
| 9711567 | Process for fabricating an integrated circuit cointegrating a FET transistor and an OxRAM memory location | Laurent Grenouillet, Maud Vinet | 2017-07-18 |
| 9673329 | Method for manufacturing a fin MOS transistor | Romain Wacquez, Laurent Grenouillet, Yannick Le Tiec, Maud Vinet | 2017-06-06 |
| 9536951 | FinFET transistor comprising portions of SiGe with a crystal orientation [111] | Sylvain Maitrejean, Emmanuel Augendre, Louis HUTIN | 2017-01-03 |
| 9502558 | Local strain generation in an SOI substrate | Shay Reboh, Laurent Grenouillet, Cyrille Le Royer, Sylvain Maitrejean | 2016-11-22 |
| 9425051 | Method for producing a silicon-germanium film with variable germanium content | Maud Vinet, Laurent Grenouillet | 2016-08-23 |
| 9425255 | Nanowire and planar transistors co-integrated on utbox SOI substrate | Sylvain Barraud | 2016-08-23 |
| 9276073 | Nanowire and planar transistors co-integrated on utbox SOI substrate | Sylvain Barraud | 2016-03-01 |
| 9269570 | Contact on a heterogeneous semiconductor substrate | Charles Baudot, Fabrice Nemouchi | 2016-02-23 |
| 9240325 | Method for making an integrated circuit | Sebastien Barnola, Heimanu Niebojewski | 2016-01-19 |
| 9236478 | Method for manufacturing a fin MOS transistor | Romain Wacquez, Laurent Grenouillet, Yannick Le Tiec, Maud Vinet | 2016-01-12 |
| 9117805 | Air-spacer MOS transistor | Heimanu Niebojewski, Cyrille Le Royer | 2015-08-25 |
| 8980702 | Method of making a transistor | Heimanu Niebojewski, Maud Vinet | 2015-03-17 |
| 8962399 | Method of making a semiconductor layer having at least two different thicknesses | Maud Vinet, Heimanu Niebojewski | 2015-02-24 |