Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8895420 | Method of fabricating a device with a concentration gradient and the corresponding device | Daniel Bensahel | 2014-11-25 |
| 8877622 | Process for producing an integrated circuit | Thierry Poiroux, Sebastien Barnola | 2014-11-04 |
| 8822332 | Method for forming gate, source, and drain contacts on a MOS transistor | Heimanu Niebojewski, Cyrille Le Royer, Fabrice Nemouchi | 2014-09-02 |
| 8722471 | Method for forming a via contacting several levels of semiconductor layers | Perrine Batude | 2014-05-13 |
| 8598038 | Process for producing two interleaved patterns on a substrate | Thierry Poiroux | 2013-12-03 |
| 8575011 | Method of fabricating a device with a concentration gradient and the corresponding device | Daniel Bensahel | 2013-11-05 |
| 8530292 | Method for manufacturing a strained channel MOS transistor | Thierry Poiroux, Jean-Charles Barbe | 2013-09-10 |
| 8486514 | Method to fabricate a mould for lithography by nano-imprinting | Stefan Landis | 2013-07-16 |
| 8470689 | Method for forming a multilayer structure | Sébastien Desplobain, Frederic Gaillard, Fabrice Nemouchi | 2013-06-25 |
| 8247313 | Method for preparing a germanium layer from a silicon-germanium-on-isolator substrate | Benjamin Vincent, Jean-Francois Damlencourt | 2012-08-21 |
| 8178426 | Method for manufacturing a structure of semiconductor-on-insulator type | Aomar Halimaoui, Yves Campidelli, Olivier Kermarrec | 2012-05-15 |
| 7972971 | Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium | Jean-Francois Damlencourt, Laurent Clavelier | 2011-07-05 |
| 7829916 | Transistor with a germanium-based channel encased by a gate electrode and method for producing one such transistor | Thierry Poiroux, Maud Vinet | 2010-11-09 |
| 7625811 | Method for producing distinct first and second active semi-conducting zones and use thereof for fabricating C-MOS structures | Jean-Charles Barbe, Laurent Clavelier, Benoit Vianay | 2009-12-01 |
| 7598145 | Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium | Jean-Francois Damlencourt, Laurent Clavelier | 2009-10-06 |
| 7381267 | Heteroatomic single-crystal layers | Daniel Bensahel, Olivier Kermarrec, Yves Campidelli, Vincent Cosnier | 2008-06-03 |
| 7361592 | Method for producing a component comprising at least one germanium-based element and component obtained by such a method | Thierry Poiroux, Maud Vinet | 2008-04-22 |
| 7141837 | High-density MOS transistor | Philippe Coronel, Thomas Skotnicki, Robin Cerutti | 2006-11-28 |
| 7129563 | Method of fabricating a semiconductor device comprising a gate dielectric made of high dielectric permittivity material | Vincent Cosnier, Olivier Kermarrec, Daniel Bensahel, Yves Campidelli | 2006-10-31 |
| 7041539 | Method for making an island of material confined between electrodes, and application to transistors | David Fraboulet, Denis Mariolle | 2006-05-09 |
| 6875686 | Method for fabricating a structure of interconnections comprising an electric insulation including air or vacuum gaps | Olivier Demolliens, Pascale Berruyer, Yorick Trouiller | 2005-04-05 |
| 6734483 | Process for fabricating a capacitor within an integrated circuit, and corresponding integrated circuit | Jean-Luc Pelloie | 2004-05-11 |
| 6551930 | Etching an organic material layer, particularly for producing interconnections of the damascene type | Francoise Vinet | 2003-04-22 |
| 6521533 | Method for producing a copper connection | Yveline Gobil, Olivier Demolliens, Myriam Assous | 2003-02-18 |
| 6228765 | Structure and method for forming conductive members in an integrated circuit | Mehdi Moussavi | 2001-05-08 |