Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12322717 | Semiconductor device and method for manufacturing a semiconductor device | Jens Hofrichter, Manuel Kaschowitz, Bernhard Poelzl, Karl Rohracher, Amandine Jouve +3 more | 2025-06-03 |
| 12198940 | Method for modifying the strain state of a block of a semiconducting material | Shay Reboh, Romain Wacquez | 2025-01-14 |
| 11810789 | Method of fabricating a semiconductor substrate having a stressed semiconductor region | Shay Reboh, Victor Boureau, Francois Andrieu | 2023-11-07 |
| 11694991 | Method for transferring chips | Frank Fournel, Emilie Bourjot, Severine Cheramy, Loic Sanchez | 2023-07-04 |
| 11688811 | Transistor comprising a channel placed under shear strain and fabrication process | Emmanuel Augendre, Maxime Argoud, Pierre Morin, Raluca Tiron | 2023-06-27 |
| 11424121 | Method for forming a layer by cyclic epitaxy | Vincent Mazzocchi | 2022-08-23 |
| 11195711 | Healing method before transfer of a semiconducting layer | Pablo Acosta Alba, Frédéric Mazen, Sebastien Kerdiles | 2021-12-07 |
| 11081463 | Bonding method with electron-stimulated desorption | Frank Fournel, Vincent Larrey, Christophe Morales | 2021-08-03 |
| 10978594 | Transistor comprising a channel placed under shear strain and fabrication process | Emmanuel Augendre, Maxime Argoud, Pierre Morin, Raluca Tiron | 2021-04-13 |
| 10879083 | Method for modifying the strain state of a block of a semiconducting material | Shay Reboh, Romain Wacquez | 2020-12-29 |
| 10665497 | Method of manufacturing a structure having one or several strained semiconducting zones that may for transistor channel regions | Emmanuel Augendre, Nicolas Loubet, Pierre Morin | 2020-05-26 |
| 10600786 | Method for fabricating a device with a tensile-strained NMOS transistor and a uniaxial compression strained PMOS transistor | Emmanuel Augendre, Pierre Morin, Shay Reboh | 2020-03-24 |
| 9853124 | Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacers | Sylvain Barraud, Emmanuel Augendre, Nicolas Posseme | 2017-12-26 |
| 9853130 | Method of modifying the strain state of a semiconducting structure with stacked transistor channels | Emmanuel Augendre, Jean-Charles Barbe, Benoit Mathieu, Yves Morand | 2017-12-26 |
| 9761607 | Method for producing strained semi-conductor blocks on the insulating layer of a semi-conductor on insulator substrate | Shay Reboh, Perrine Batude, Frédéric Mazen | 2017-09-12 |
| 9704709 | Method for causing tensile strain in a semiconductor film | Emmanuel Augendre, Aomar Halimaoui, Shay Reboh | 2017-07-11 |
| 9536951 | FinFET transistor comprising portions of SiGe with a crystal orientation [111] | Emmanuel Augendre, Louis HUTIN, Yves Morand | 2017-01-03 |
| 9502558 | Local strain generation in an SOI substrate | Shay Reboh, Laurent Grenouillet, Cyrille Le Royer, Yves Morand | 2016-11-22 |
| 9460971 | Method to co-integrate oppositely strained semiconductor devices on a same substrate | Nicolas Loubet, Romain Wacquez | 2016-10-04 |
| 9230991 | Method to co-integrate oppositely strained semiconductor devices on a same substrate | Nicolas Loubet, Romain Wacquez | 2016-01-05 |
| 8847395 | Microelectronic device having metal interconnection levels connected by programmable vias | Thomas Ernst, Paul Morel | 2014-09-30 |
| 8367547 | Method for creating a metal crystalline region, in particular in an integrated circuit | Cyril Cayron | 2013-02-05 |
| 8114777 | Horizontal nanotube/nanofiber growth method | Gerard Passemard, Valentina Ivanova-Hristova | 2012-02-14 |