Issued Patents All Time
Showing 1,651–1,675 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9768072 | Fabrication of a vertical fin field effect transistor with reduced dimensional variations | — | 2017-09-19 |
| 9768104 | Method and structure to fabricate a nanoporous membrane | Zhenxing Bi, Shogo Mochizuki, Hao Tang | 2017-09-19 |
| 9768075 | Method and structure to enable dual channel fin critical dimension control | Marc A. Bergendahl, John R. Sporre, Sean Teehan | 2017-09-19 |
| 9761726 | Vertical field effect transistor with undercut buried insulating layer to improve contact resistance | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-09-12 |
| 9761450 | Forming a fin cut in a hardmask | Zhenxing Bi, Juntao Li, Peng Xu | 2017-09-12 |
| 9761496 | Field effect transistor contacts | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-09-12 |
| 9761500 | FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-09-12 |
| 9761587 | Tall strained high percentage silicon germanium fins for CMOS | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-09-12 |
| 9761610 | Strain release in PFET regions | Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-09-12 |
| 9761667 | Semiconductor structure with a silicon germanium alloy fin and silicon germanium alloy pad structure | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-09-12 |
| 9761694 | Vertical FET with selective atomic layer deposition gate | Xin Miao, Wenyu Xu, Chen Zhang | 2017-09-12 |
| 9761717 | Stress memorization technique for strain coupling enhancement in bulk finFET device | Juntao Li, Chun-Chen Yeh | 2017-09-12 |
| 9761728 | Self-aligned source/drain junction for vertical field-effect transistor (FET) and method of forming the same | Xin Miao, Wenyu Xu, Chen Zhang | 2017-09-12 |
| 9754941 | Method and structure to form tensile strained SiGe fins and compressive strained SiGe fins on a same substrate | Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2017-09-05 |
| 9754933 | Large area diode co-integrated with vertical field-effect-transistors | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-09-05 |
| 9753006 | High density nano-array for sensing | Qing Cao, Zhengwen Li, Fei Liu, Zhen Zhang | 2017-09-05 |
| 9755073 | Fabrication of vertical field effect transistor structure with strained channels | Juntao Li | 2017-09-05 |
| 9754942 | Single spacer for complementary metal oxide semiconductor process flow | Marc A. Bergendahl, Jessica Dechene, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +2 more | 2017-09-05 |
| 9748245 | Multiple finFET formation with epitaxy separation | Juntao Li, Peng Xu | 2017-08-29 |
| 9748239 | Fin-double-gated junction field effect transistor | Tak H. Ning | 2017-08-29 |
| 9748114 | Method for forming through silicon via in N+ epitaxy wafers with reduced parasitic capacitance | Subramanian S. Iyer, Pranita Kerber, Ali Khakifirooz | 2017-08-29 |
| 9748146 | Single spacer for complementary metal oxide semiconductor process flow | Marc A. Bergendahl, Jessica Dechene, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +2 more | 2017-08-29 |
| 9748385 | Method for forming vertical Schottky contact FET | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-08-29 |
| 9748381 | Pillar formation for heat dissipation and isolation in vertical field effect transistors | Zhenxing Bi, Peng Xu, Chen Zhang | 2017-08-29 |
| 9748365 | SiGe and Si FinFET structures and methods for making the same | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-08-29 |