Issued Patents All Time
Showing 1,601–1,625 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9806153 | Controlling channel length for vertical FETs | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2017-10-31 |
| 9806084 | Anti-fuse with reduced programming voltage | Juntao Li, Chengwen Pei, Geng Wang | 2017-10-31 |
| 9805983 | Multi-layer filled gate cut to prevent power rail shorting to gate structure | Hao Tang, Peng Xu | 2017-10-31 |
| 9799600 | Nickel-silicon fuse for FinFET structures | Keith E. Fogel, Pouya Hashemi, Alexander Reznicek | 2017-10-24 |
| 9799765 | Formation of a bottom source-drain for vertical field-effect transistors | Marc A. Bergendahl, Fee Li Lie, Shogo Mochizuki, Junli Wang | 2017-10-24 |
| 9799749 | Vertical transport FET devices with uniform bottom spacer | Zhenxing Bi, Juntao Li, Xin Miao | 2017-10-24 |
| 9799746 | Preventing leakage inside air-gap spacer during contact formation | Ruilong Xie, Tenko Yamashita | 2017-10-24 |
| 9799730 | FINFETs with high quality source/drain structures | Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2017-10-24 |
| 9799655 | Flipped vertical field-effect-transistor | Xin Miao, Wenyu Xu, Chen Zhang | 2017-10-24 |
| 9799647 | Integrated device with P-I-N diodes and vertical field effect transistors | Juntao Li, Geng Wang, Qintao Zhang | 2017-10-24 |
| 9799570 | Fabrication of vertical field effect transistors with uniform structural profiles | — | 2017-10-24 |
| 9799569 | Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-10-24 |
| 9799568 | Field effect transistor including strained germanium fins | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-24 |
| 9793113 | Semiconductor structure having insulator pillars and semiconductor material on substrate | Alexander Reznicek, Dominic J. Schepis, Bruce B. Doris, Pouya Hashemi | 2017-10-17 |
| 9793401 | Vertical field effect transistor including extension and stressors | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-17 |
| 9793400 | Semiconductor device including dual-layer source/drain region | Robert H. Dennard, Zhen Zhang | 2017-10-17 |
| 9793379 | FinFET spacer without substrate gouging or spacer foot | Veeraraghavan S. Basker, Ali Khakifirooz, Raghavasimhan Sreenivasan | 2017-10-17 |
| 9793349 | Vertical single electron transistor formed by condensation | Xin Miao, Wenyu Xu, Chen Zhang | 2017-10-17 |
| 9793341 | Deep trench capacitor with metal plate | Ali Khakifirooz, Davood Shahrjerdi, Herbert L. Ho | 2017-10-17 |
| 9793274 | CMOS transistors including gate spacers of the same thickness | Veeraraghavan S. Basker, Ali Khakifirooz | 2017-10-17 |
| 9793270 | Forming gates with varying length using sidewall image transfer | Juntao Li, Geng Wang, Qintao Zhang | 2017-10-17 |
| 9793175 | FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-10-17 |
| 9793157 | Etch stop for airgap protection | Ruilong Xie, Tenko Yamashita | 2017-10-17 |
| 9786547 | Channel silicon germanium formation method | Nicolas Degors, Shawn P. Fetterolf, Ahmet S. Ozcan | 2017-10-10 |
| 9786851 | Transistor with trapeziod shaped carbon namotubes | Qing Cao, Zhengwen Li, Fei Liu, Zhen Zhang | 2017-10-10 |