Issued Patents All Time
Showing 276–300 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11195912 | Inner spacer for nanosheet transistors | Choonghyun Lee, Juntao Li, Peng Xu | 2021-12-07 |
| 11196575 | On-chipset certification to prevent spy chip | — | 2021-12-07 |
| 11189724 | Method of forming a top epitaxy source/drain structure for a vertical transistor | Dexin Kong, Shogo Mochizuki | 2021-11-30 |
| 11189729 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu | 2021-11-30 |
| 11189693 | Transistor having reduced contact resistance | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2021-11-30 |
| 11189713 | Nanosheet transistor having wrap-around bottom isolation | Ruilong Xie, Lan Yu, Heng Wu | 2021-11-30 |
| 11183430 | Self-limiting liners for increasing contact trench volume in n-type and p-type transistors | Choonghyun Lee, Juntao Li, Peng Xu | 2021-11-23 |
| 11183561 | Nanosheet transistor with inner spacers | Ruilong Xie, Chanro Park, Juntao Li | 2021-11-23 |
| 11183577 | Formation of air gap spacers for reducing parasitic capacitance | Peng Xu, Choonghyun Lee, Heng Wu | 2021-11-23 |
| 11183578 | Contact over active gate employing a stacked spacer | — | 2021-11-23 |
| 11183581 | Vertical field effect transistor having improved uniformity | Juntao Li, Ruilong Xie, Chanro Park | 2021-11-23 |
| 11183636 | Techniques for forming RRAM cells | Juntao Li, Dexin Kong, Takashi Ando | 2021-11-23 |
| 11177181 | Scalable device for FINFET technology | Ruilong Xie, Juntao Li, Chanro Park | 2021-11-16 |
| 11177632 | Augmented semiconductor lasers with spontaneous emissions blockage | Julien Frougier, Ruilong Xie, Chanro Park | 2021-11-16 |
| 11177285 | Conductive contacts in semiconductor on insulator substrate | Rama Divakaruni | 2021-11-16 |
| 11177369 | Stacked vertical field effect transistor with self-aligned junctions | Lan Yu, Xin Miao, Chen Zhang, Heng Wu | 2021-11-16 |
| 11171204 | High thermal budget compatible punch through stop integration using doped glass | Sanjay C. Mehta, Xin Miao, Chun-Chen Yeh | 2021-11-09 |
| 11171044 | Planarization controllability for interconnect structures | Ruilong Xie, Chanro Park, Julien Frougier, Chih-Chao Yang | 2021-11-09 |
| 11164799 | Stacked vertical transport field effect transistor contact formation | Heng Wu, Chen Zhang, Tenko Yamashita | 2021-11-02 |
| 11164959 | VFET devices with ILD protection | Zhenxing Bi, Juntao Li, Peng Xu | 2021-11-02 |
| 11164940 | Method of forming III-V on insulator structure on semiconductor substrate | Xin Miao, Wenyu Xu, Chen Zhang | 2021-11-02 |
| 11154628 | Self-sterilizing sensor | Shawn P. Fetterolf, Donald F. Canaperi, Lawrence A. Clevenger | 2021-10-26 |
| 11158544 | Vertical stacked nanosheet CMOS transistors with different work function metals | Juntao Li, Ruilong Xie, Chanro Park | 2021-10-26 |
| 11158730 | Formation of inner spacer on nanosheet MOSFET | Zhenxing Bi, Juntao Li, Peng Xu | 2021-10-26 |
| 11152213 | Transistor device with ultra low-k self aligned contact cap and ultra low-k spacer | — | 2021-10-19 |