Issued Patents All Time
Showing 76–100 of 168 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11183577 | Formation of air gap spacers for reducing parasitic capacitance | Kangguo Cheng, Peng Xu, Choonghyun Lee | 2021-11-23 |
| 11177258 | Stacked nanosheet CFET with gate all around structure | Ruilong Xie, Alexander Reznicek, Lan Yu | 2021-11-16 |
| 11177369 | Stacked vertical field effect transistor with self-aligned junctions | Lan Yu, Xin Miao, Chen Zhang, Kangguo Cheng | 2021-11-16 |
| 11177367 | Self-aligned bottom spacer EPI last flow for VTFET | Tao Li, Ruilong Xie, Sung-Dae Suk | 2021-11-16 |
| 11164799 | Stacked vertical transport field effect transistor contact formation | Chen Zhang, Kangguo Cheng, Tenko Yamashita | 2021-11-02 |
| 11164870 | Stacked upper fin and lower fin transistor with separate gate | Ruilong Xie, Chun Wing Yeung, Lan Yu | 2021-11-02 |
| 11164947 | Wrap around contact formation for VTFET | Ruilong Xie, Shogo Mochizuki, Lan Yu | 2021-11-02 |
| 11164791 | Contact formation for stacked vertical transport field-effect transistors | Tenko Yamashita, Chen Zhang, Joshua M. Rubin | 2021-11-02 |
| 11158543 | Silicide formation for source/drain contact in a vertical transport field-effect transistor | Su Chen Fan, Ruilong Xie, Huai Huang | 2021-10-26 |
| 11145380 | Analog nonvolatile memory cells using dopant activation | Tenko Yamashita, Oleg Gluschenkov, Alexander Reznicek | 2021-10-12 |
| 11094798 | Vertical FET with symmetric junctions | Lan Yu, Xin Miao, Chen Zhang, Kangguo Cheng | 2021-08-17 |
| 11081567 | Replacement-channel fabrication of III-V nanosheet devices | Jingyun Zhang, Choonghyun Lee, Chun Wing Yeung, Robin Hsin Kuo Chao | 2021-08-03 |
| 11075334 | Spin-orbit-torque magneto-resistive random access memory with stepped bottom electrode | Alexander Reznicek, Ruilong Xie, Lan Yu | 2021-07-27 |
| 11069679 | Reducing gate resistance in stacked vertical transport field effect transistors | Chen Zhang, Kangguo Cheng, Tenko Yamashita, Joshua M. Rubin | 2021-07-20 |
| 11062960 | Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices | Kangguo Cheng, Junli Wang, Zuoguang Liu | 2021-07-13 |
| 11056588 | Vertical transport field effect transistor with bottom source/drain | Gen Tsutsui, Lan Yu, Ruilong Xie | 2021-07-06 |
| 11049940 | Method and structure for forming silicon germanium finFET | Peng Xu, Kangguo Cheng, Juntao Li | 2021-06-29 |
| 11049953 | Nanosheet transistor | Kangguo Cheng, Juntao Li, Peng Xu | 2021-06-29 |
| 11037905 | Formation of stacked vertical transport field effect transistors | Gen Tsutsui, Tenko Yamashita | 2021-06-15 |
| 11024369 | Static random-access memory cell design | Lan Yu, Junli Wang, Ruqiang Bao, Dechao Guo | 2021-06-01 |
| 11024670 | Forming an MRAM device over a transistor | Alexander Reznicek, Ruilong Xie, Lan Yu | 2021-06-01 |
| 11011517 | Semiconductor structure including first FinFET devices for low power applications and second FinFET devices for high power applications | Lan Yu, Junli Wang, Ruqiang Bao, Dechao Guo | 2021-05-18 |
| 11011617 | Formation of a partial air-gap spacer | Choonghyun Lee, Kangguo Cheng, Peng Xu | 2021-05-18 |
| 11004984 | Low resistivity epitaxially formed contact region for nanosheet external resistance reduction | Oleg Gluschenkov, Lan Yu, Ruilong Xie | 2021-05-11 |
| 11004856 | Stacked vertical transistor memory cell with epi connections | Chen Zhang, Tenko Yamashita, Kangguo Cheng | 2021-05-11 |