Issued Patents All Time
Showing 126–150 of 399 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10629532 | Integrated circuit structure having gate contact and method of forming same | Josef S. Watts | 2020-04-21 |
| 10622463 | Method, apparatus and system for improved performance using tall fins in finFET devices | Min-hwa Chi, Jinping Liu | 2020-04-14 |
| 10607893 | Middle of line structures | Ruilong Xie | 2020-03-31 |
| 10600914 | Isolation pillar first gate structures and methods of forming same | Wei Zhao, Ming Hao Tang, Haiting Wang, Rui Chen, Yuping Ren +2 more | 2020-03-24 |
| 10600876 | Methods for chamfering work function material layers in gate cavities having varying widths | Guowei Xu, Rongtao Lu | 2020-03-24 |
| 10593757 | Integrated circuits having converted self-aligned epitaxial etch stop | Jiehui Shu, Ruilong Xie, Haiting Wang | 2020-03-17 |
| 10586860 | Method of manufacturing finfet devices using narrow and wide gate cut openings in conjunction with a replacement metal gate process | Jiehui Shu, Laertis Economikos, Xusheng Wu, John H. Zhang, Haigou Huang +4 more | 2020-03-10 |
| 10586855 | Spacer chamfering gate stack scheme | Hyun-Jin Cho, Tenko Yamashita | 2020-03-10 |
| 10586736 | Hybrid fin cut with improved fin profiles | Haiting Wang, Ruilong Xie, Shesh Mani Pandey, Garo Derderian, Scott Beasor | 2020-03-10 |
| 10580875 | Middle of line structures | Guowei Xu, Keith H. Tabakman, Viraj Sardesai | 2020-03-03 |
| 10580701 | Methods of making a self-aligned gate contact structure and source/drain metallization structures on integrated circuit products | Scott Beasor, Haiting Wang | 2020-03-03 |
| 10580685 | Integrated single diffusion break | Haiting Wang, Hong Yu, Laertis Economikos | 2020-03-03 |
| 10573753 | Oxide spacer in a contact over active gate finFET and method of production thereof | Laertis Economikos, Jiehui Shu, Ruilong Xie | 2020-02-25 |
| 10566202 | Gate structures of FinFET semiconductor devices | Jiehui Shu, Hong Yu | 2020-02-18 |
| 10566201 | Gate cut method after source/drain metallization | Chanro Park, Ruilong Xie, Laertis Economikos, Andre P. Labonte | 2020-02-18 |
| 10559686 | Methods of forming gate contact over active region for vertical FinFET, and structures formed thereby | Ruilong Xie, Steven R. Soss | 2020-02-11 |
| 10559656 | Wrap-all-around contact for nanosheet-FET and method of forming same | Emilie Bourjot, Julien Frougier, Yi Qi, Ruilong Xie, Hsien-Ching Lo +1 more | 2020-02-11 |
| 10553707 | FinFETs having gates parallel to fins | Yanping Shen, Bingwu Liu, Manoj Joshi, Jae Gon Lee, Hsien-Ching Lo +1 more | 2020-02-04 |
| 10553698 | Methods, apparatus and system for a self-aligned gate cut on a semiconductor device | Laertis Economikos, Ruilong Xie | 2020-02-04 |
| 10553486 | Field effect transistors with self-aligned metal plugs and methods | Ruilong Xie, Laertis Economikos | 2020-02-04 |
| 10546853 | Metal resistors integrated into poly-open-chemical-mechanical-polishing (POC) module and method of production thereof | Laertis Economikos, Ruilong Xie | 2020-01-28 |
| 10546775 | Field-effect transistors with improved dielectric gap fill | Wei Hong, Liu Jiang, Yongjun Shi, Yi Qi, Hsien-Ching Lo | 2020-01-28 |
| 10535771 | Method for forming replacement air gap | Laertis Economikos, Shesh Mani Pandey, Haiting Wang, Jinping Liu | 2020-01-14 |
| 10529724 | Method of manufacturing a vertical SRAM with cross-coupled contacts penetrating through common gate structures | Manfred Eller, Kwan-Yong Lim | 2020-01-07 |
| 10528889 | Stereoscopic learning for classification | Jiangsheng Yu | 2020-01-07 |