Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12058257 | Data storage method, data read method, electronic device, and program product | Jinpeng Liu, Chao-Chuan Chen, Zhen Jia | 2024-08-06 |
| 11931671 | Three-stage tubular T-shaped degassing device with microbubble axial flow and spiral flow fields | Xinfu Liu, Zhongxian Hao, Ji Chen, Chaoyong Yu, Guanghai Yu +6 more | 2024-03-19 |
| 11872505 | Separation device with two-stage gas-liquid mixture and conical spiral fields | Chunhua Liu, Ji Chen, Zhongxian Hao, Xinfu Liu, Feng Liu +3 more | 2024-01-16 |
| 11171036 | Preventing dielectric void over trench isolation region | Wei Hong, Chun Yu Wong, Halting Wang, Liu Jiang | 2021-11-09 |
| 11093232 | Microservice update system | Marc Marcel René Maréchal | 2021-08-17 |
| 10910276 | STI structure with liner along lower portion of longitudinal sides of active region, and related FET and method | Xinyuan Dou, Chun Yu Wong, Hongliang Shen, Baofu Zhu | 2021-02-02 |
| 10804199 | Self-aligned chamferless interconnect structures of semiconductor devices | Ruilong Xie, Nan Fu, Chun Yu Wong | 2020-10-13 |
| 10742359 | Apparatus and method for improving messaging system reliability | Wenyu Tang, Han Gao, Don Mace, Jim Lewei JI, Charlie Chen +1 more | 2020-08-11 |
| 10712959 | Method, device and computer program product for storing data | Junping Zhao | 2020-07-14 |
| 10636894 | Fin-type transistors with spacers on the gates | Yanping Shen, Hui Zang, Hsien-Ching Lo, Qun Gao, Jerome Ciavatti +4 more | 2020-04-28 |
| 10546775 | Field-effect transistors with improved dielectric gap fill | Wei Hong, Liu Jiang, Yi Qi, Hsien-Ching Lo, Hui Zang | 2020-01-28 |
| 10461155 | Epitaxial region for embedded source/drain region having uniform thickness | Yoong Hooi Yong, Yanping Shen, Hsien-Ching Lo, Xusheng Wu, Joo Tat Ong +6 more | 2019-10-29 |
| 10297675 | Dual-curvature cavity for epitaxial semiconductor growth | Alina Vinslava, Hsien-Ching Lo, Jianwei Peng, Jianghu Yan, Yi Qi | 2019-05-21 |
| 10249538 | Method of forming vertical field effect transistors with different gate lengths and a resulting structure | Yi Qi, Hsien-Ching Lo, Jianwei Peng, Wei Hong, Yanping Shen +5 more | 2019-04-02 |
| 10164010 | Finfet diffusion break having protective liner in fin insulator | Wei Hong, Hsien-Ching Lo, Haiting Wang, Yanping Shen, Yi Qi +2 more | 2018-12-25 |
| 10068902 | Integrated circuit structure incorporating non-planar field effect transistors with different channel region heights and method | Yanping Shen, Hui Zang, Hsien-Ching Lo, Randy W. Mann, Yi Qi +4 more | 2018-09-04 |