Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11563085 | Transistors with separately-formed source and drain | Jiehui Shu, Haiting Wang, Sipeng Gu | 2023-01-24 |
| 11362177 | Epitaxial semiconductor material regions for transistor devices and methods of forming same | Arkadiusz Malinowski, Frank W. Mont, Ali Razavieh, Julien Frougier | 2022-06-14 |
| 11362178 | Asymmetric source drain structures | Jiehui Shu, Rinus Tek Po Lee | 2022-06-14 |
| 11239315 | Dual trench isolation structures | Shiv Kumar Mishra, Arkadiusz Malinowski, Kaushikee Mishra | 2022-02-01 |
| 11239366 | Transistors with an asymmetrical source and drain | Wenjun Li, Man Gu | 2022-02-01 |
| 11205699 | Epitaxial semiconductor material regions for transistor devices and methods of forming same | Arkadiusz Malinowski, Frank W. Mont, Julien Frougier, Ali Razavieh | 2021-12-21 |
| 11177385 | Transistors with a hybrid source or drain | Haiting Wang, Sipeng Gu, Jiehui Shu | 2021-11-16 |
| 11094822 | Source/drain regions for transistor devices and methods of forming same | Arkadiusz Malinowski, Judson R. Holt, Shiv Kumar Mishra | 2021-08-17 |
| 11075268 | Transistors with separately-formed source and drain | Jiehui Shu, Haiting Wang, Sipeng Gu | 2021-07-27 |
| 10985244 | N-well resistor | Shesh Mani Pandey, Chung Foong Tan | 2021-04-20 |
| 10910276 | STI structure with liner along lower portion of longitudinal sides of active region, and related FET and method | Yongjun Shi, Xinyuan Dou, Chun Yu Wong, Hongliang Shen | 2021-02-02 |
| 10164099 | Device with diffusion blocking layer in source/drain region | Shesh Mani Pandey, Pei Zhao, Francis Benistant | 2018-12-25 |
| 10020386 | High-voltage and analog bipolar devices | Jagar Singh | 2018-07-10 |
| 10002793 | Sub-fin doping method | Jiehui Shu, David Paul Brunco, Jinping Liu, Shesh Mani Pandey | 2018-06-19 |
| 9966313 | FinFET device and method of manufacturing | Shesh Mani Pandey, Srikanth B. Samavedam | 2018-05-08 |
| 9947788 | Device with diffusion blocking layer in source/drain region | Shesh Mani Pandey, Pei Zhao, Francis Benistant | 2018-04-17 |
| 9099434 | High voltage device | Guowei Zhang, Purakh Raj Verma | 2015-08-04 |
| 8846464 | Semiconductor device having controlled final metal critical dimension | Bingwu Liu, Nam Sung Kim | 2014-09-30 |
| 8790966 | High voltage device | Guowei Zhang, Purakh Raj Verma | 2014-07-29 |
| 8053319 | Method of forming a high voltage device | Junwen LIU, Purakh Raj Verma, Yan Jin | 2011-11-08 |