Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8076712 | Semiconductor memory comprising dual charge storage nodes and methods for its fabrication | Chungho Lee, Ashot Melik-Martirosian, Wei Zheng, Timothy Thurgate, Chi Chang +2 more | 2011-12-13 |
| 7985687 | System and method for improving reliability in a semiconductor device | Angela T. Hui, Hiroyuki Kinoshita, Harpreet Sachar | 2011-07-26 |
| 7842618 | System and method for improving mesa width in a semiconductor device | Angela T. Hui, Yider Wu, Kuo-Tung Chang, Hiroyuki Kinoshita | 2010-11-30 |
| 7785965 | Dual storage node memory devices and methods for fabricating the same | Kyunghoon Min, Ning Cheng, Hiroyuki Kinoshita, Sugino Rinji, Timothy Thurgate +3 more | 2010-08-31 |
| 7767517 | Semiconductor memory comprising dual charge storage nodes and methods for its fabrication | Chungho Lee, Ashot Melik-Martirosian, Wei Zheng, Timothy Thurgate, Chi Chang +2 more | 2010-08-03 |
| 7679129 | System and method for improving oxide-nitride-oxide (ONO) coupling in a semiconductor device | Angela T. Hui, Hiroyuki Kinoshita, Kuo-Tung Chang | 2010-03-16 |
| 7439141 | Shallow trench isolation approach for improved STI corner rounding | Yu Sun, Hiroyuki Kinoshita, Kuo-Tung Chang, Harpreet Sachar, Mark S. Chang | 2008-10-21 |
| 7307002 | Non-critical complementary masking method for poly-1 definition in flash memory device fabrication | Hiroyuki Kinoshita, Yu Sun, Krishnashree Achuthan, Christopher H. Raeder, Christopher Foster +2 more | 2007-12-11 |
| 7294573 | Method for controlling poly 1 thickness and uniformity in a memory array fabrication process | Krishnashree Achuthan, Kashmir Sahota, Patriz C. Regalado | 2007-11-13 |
| 7078314 | Memory device having improved periphery and core isolation | Hiroyuki Kinoshita, Yu Sun | 2006-07-18 |
| 6924220 | Self-aligned gate formation using polysilicon polish with peripheral protective layer | Kai Yang, John Jianshi Wang | 2005-08-02 |
| 6764920 | Method for reducing shallow trench isolation edge thinning on tunnel oxides using partial nitride strip and small bird's beak formation for high performance flash memory devices | Nian Yang, John Jianshi Wang | 2004-07-20 |
| 6693009 | Flash memory cell with minimized floating gate to drain/source overlap for minimizing charge leakage | Hyeon-Seag Kim, Munseork Choi | 2004-02-17 |
| 6670691 | Shallow trench isolation fill process | Harpreet Sachar, Jack F. Thomas | 2003-12-30 |
| 6664191 | Non self-aligned shallow trench isolation process with disposable space to define sub-lithographic poly space | Yider Wu, Yu Sun, Michael K. Templeton, Angela T. Hui, Chi Chang | 2003-12-16 |
| 6610577 | Self-aligned polysilicon polish | Jack F. Thomas, Krishnashree Achuthan | 2003-08-26 |
| 6607925 | Hard mask removal process including isolation dielectric refill | Dawn Hopper, Yider Wu, Krishnashree Achuthan | 2003-08-19 |
| 6566230 | Shallow trench isolation spacer for weff improvement | Harpreet Sachar, Mark S. Chang, Chih-Yuh Yang, Jayendra D. Bhakta | 2003-05-20 |
| 6555867 | Flash memory gate coupling using HSG polysilicon | — | 2003-04-29 |
| 6548855 | Non-volatile memory dielectric as charge pump dielectric | Mark T. Ramsbey, Arvind Halliyal, Kuo-Tung Chang, Nicholas H. Tripsas, Wei Zheng | 2003-04-15 |
| 6509232 | Formation of STI (shallow trench isolation) structures within core and periphery areas of flash memory device | Mark S. Chang, Yider Wu, Chi Chang, Angela T. Hui, Yu Sun | 2003-01-21 |
| 6444530 | Process for fabricating an integrated circuit with a self-aligned contact | Hung-Sheng Chen, Yu Sun, Chi Chang, Mark T. Ramsbey, Mark Randolph +4 more | 2002-09-03 |
| 6433383 | Methods and arrangements for forming a single interpoly dielectric layer in a semiconductor device | Mark T. Ramsbey, Kenneth Wo-Wai Au, David Chi, James M. Markarian | 2002-08-13 |
| 6103593 | Method and system for providing a contact on a semiconductor device | Angela T. Hui, Hung-Sheng Chen | 2000-08-15 |
| 6040597 | Isolation boundaries in flash memory cores | Yowjuang W. Liu, Yu Sun | 2000-03-21 |