Issued Patents All Time
Showing 1–25 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7859056 | Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection | Minchang Liang | 2010-12-28 |
| 7394132 | Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection | Minchang Liang | 2008-07-01 |
| 6939752 | Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection | Minchang Liang | 2005-09-06 |
| 6808988 | Method for forming isolation in flash memory wafer | Hung-Sheng Chen | 2004-10-26 |
| 6790750 | Semiconductor-on-insulator body-source contact and method | Wei Long, Qi Xiang | 2004-09-14 |
| 6764904 | Trenched gate non-volatile semiconductor method with the source/drain regions spaced from the trench by sidewall dopings | Donald L. Wollesen | 2004-07-20 |
| 6744101 | Non-uniform gate/dielectric field effect transistor | Wei Long, Don Wollesen | 2004-06-01 |
| 6667227 | Trenched gate metal oxide semiconductor device and method | Donald L. Wollesen | 2003-12-23 |
| 6528847 | Metal oxide semiconductor device having contoured channel region and elevated source and drain regions | — | 2003-03-04 |
| 6525381 | Semiconductor-on-insulator body-source contact using shallow-doped source, and method | Wei Long, Qi Xiang | 2003-02-25 |
| 6461951 | Method of forming a sidewall spacer to prevent gouging of device junctions during interlayer dielectric etching including silicide growth over gate spacers | Paul R. Besser, Angela T. Hui | 2002-10-08 |
| 6441434 | Semiconductor-on-insulator body-source contact and method | Wei Long, Qi Xiang | 2002-08-27 |
| 6407558 | Method of determining the doping concentration across a surface of a semiconductor material | Sunil N. Shabde, Ting Tsui | 2002-06-18 |
| 6373103 | Semiconductor-on-insulator body-source contact using additional drain-side spacer, and method | Wei Long, Qi Xiang | 2002-04-16 |
| 6344393 | Fully recessed semiconductor method for low power applications | — | 2002-02-05 |
| 6326310 | Method and system for providing shallow trench profile shaping through spacer and etching | Mark S. Chang | 2001-12-04 |
| 6320403 | Method of determining the doping concentration and defect profile across a surface of a processed semiconductor material | Sunil N. Shabde, Ting Tsui | 2001-11-20 |
| 6309919 | Method for fabricating a trench-gated vertical CMOS device | Donald L. Wollesen | 2001-10-30 |
| 6309949 | Semiconductor isolation process to minimize weak oxide problems | Yue-Song He | 2001-10-30 |
| 6303437 | Trenched gate semiconductor method for low power applications | — | 2001-10-16 |
| 6300180 | Method for forming an integrated circuit having improved polysilicon resistor structures | Kuang-Yeh Chang | 2001-10-09 |
| 6294829 | Multilayer quadruple gate field effect transistor structure for use in integrated circuit devices | — | 2001-09-25 |
| 6285054 | Trenched gate non-volatile semiconductor device with the source/drain regions spaced from the trench by sidewall dopings | Donald L. Wollesen | 2001-09-04 |
| 6275972 | Method for accurate channel-length extraction in MOSFETs | Wei Long | 2001-08-14 |
| 6274419 | Trench isolation of field effect transistors | Farrokh Omid-Zohoor, Andre Stolmeijer, Craig S. Sander | 2001-08-14 |