Issued Patents 2020
Showing 201–225 of 332 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10622486 | Tilted nanowire transistor | Pouya Hashemi, Alexander Reznicek, Karthik Balakrishnan | 2020-04-14 |
| 10622454 | Formation of a semiconductor device with RIE-free spacers | Xin Miao, Wenyu Xu, Chen Zhang | 2020-04-14 |
| 10622354 | FinFETs with controllable and adjustable channel doping | Xin Miao, Wenyu Xu, Chen Zhang | 2020-04-14 |
| 10622264 | Nanosheet devices with different types of work function metals | Xin Miao, Wenyu Xu, Chen Zhang | 2020-04-14 |
| 10622260 | Vertical transistor with reduced parasitic capacitance | Ruilong Xie, Chanro Park | 2020-04-14 |
| 10622259 | Semiconductor devices with sidewall spacers of equal thickness | Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2020-04-14 |
| 10620158 | High density nano-array for sensing | Qing Cao, Zhengwen Li, Fei Liu, Zhen Zhang | 2020-04-14 |
| 10615082 | VFET metal gate patterning for vertical transport field effect transistor | Brent A. Anderson, Ruqiang Bao, Hemanth Jagannathan, Choonghyun Lee, Junli Wang | 2020-04-07 |
| 10615288 | Integration scheme for non-volatile memory on gate-all-around structure | Dexin Kong, Zhenxing Bi, Zheng Xu | 2020-04-07 |
| 10615278 | Preventing strained fin relaxation | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li +3 more | 2020-04-07 |
| 10615277 | VFET CMOS dual epitaxy integration | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2020-04-07 |
| 10615269 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan | 2020-04-07 |
| 10615267 | Semiconductor device strain relaxation buffer layer | Xin Miao, Wenyu Xu, Chen Zhang | 2020-04-07 |
| 10615258 | Nanosheet semiconductor structure with inner spacer formed by oxidation | Xin Miao, Chen Zhang, Wenyu Xu | 2020-04-07 |
| 10615256 | Nanosheet transistor gate structure having reduced parasitic capacitance | Xin Miao, Wenyu Xu, Chen Zhang | 2020-04-07 |
| 10615166 | Programmable device compatible with vertical transistor flow | Juntao Li, Geng Wang, Qintao Zhang | 2020-04-07 |
| 10615161 | III-V fins by aspect ratio trapping and self-aligned etch to remove rough epitaxy surface | Jeehwan Kim | 2020-04-07 |
| 10615159 | Integrated LDMOS and VFET transistors | Juntao Li, Geng Wang, Qintao Zhang | 2020-04-07 |
| 10604407 | Nanoparticle structure and process for manufacture | Qing Cao, Juntao Li | 2020-03-31 |
| 10608121 | FinFET transistor gate and epitaxy formation | Ruqiang Bao, Zhenxing Bi, Zheng Xu | 2020-03-31 |
| 10608109 | Vertical transistor with enhanced drive current | Xin Miao, Alexander Reznicek | 2020-03-31 |
| 10608100 | Unipolar spacer formation for finFETs | Peng Xu, Jie Yang | 2020-03-31 |
| 10608096 | Formation of air gap spacers for reducing parasitic capacitance | Peng Xu, Choonghyun Lee, Heng Wu | 2020-03-31 |
| 10608083 | Non-planar field effect transistor devices with low-resistance metallic gate structures | Chen Zhang, Wenyu Xu, Xin Miao | 2020-03-31 |
| 10607991 | Air gap spacer for metal gates | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan | 2020-03-31 |