Issued Patents 2020
Showing 25 most recent of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10840381 | Nanosheet and nanowire MOSFET with sharp source/drain junction | Josephine B. Chang, Kangguo Cheng, Michael A. Guillorn | 2020-11-17 |
| 10833157 | iFinFET | Juntao Li, Kangguo Cheng, Chen Zhang | 2020-11-10 |
| 10832969 | Single-fin CMOS transistors with embedded and cladded source/drain structures | Choonghyun Lee, Shogo Mochizuki, Hemanth Jagannathan | 2020-11-10 |
| 10833176 | Selectively formed gate sidewall spacer | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-11-10 |
| 10833158 | III-V segmented finFET free of wafer bonding | Chen Zhang, Kangguo Cheng, Wenyu Xu | 2020-11-10 |
| 10833073 | Vertical transistors with different gate lengths | Chen Zhang, Kangguo Cheng, Juntao Li | 2020-11-10 |
| 10811495 | Vertical field effect transistor with uniform gate length | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-10-20 |
| 10796966 | Vertical FET with various gate lengths by an oxidation process | Kangguo Cheng, Chen Zhang | 2020-10-06 |
| 10796967 | Vertical field effect transistor (FET) with controllable gate length | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-10-06 |
| 10784364 | Nanosheet with changing SiGe pecentage for SiGe lateral recess | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-09-22 |
| 10777469 | Self-aligned top spacers for vertical FETs with in situ solid state doping | Ruqiang Bao, Junli Wang, Brent A. Anderson | 2020-09-15 |
| 10756216 | Nanosheet mosfet with isolated source/drain epitaxy and close junction proximity | Alexander Reznicek, Choonghyun Lee, Jingyun Zhang | 2020-08-25 |
| 10749038 | Width adjustment of stacked nanowires | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2020-08-18 |
| 10741557 | Hybrid high mobility channel transistors | Chen Zhang, Kangguo Cheng, Wenyu Xu | 2020-08-11 |
| 10734501 | Metal gate structure having gate metal layer with a top portion width smaller than a bottom portion width to reduce transistor gate resistance | Kangguo Cheng, Chen Zhang, Wenyu Xu | 2020-08-04 |
| 10734287 | Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-08-04 |
| 10734477 | FinFET with reduced parasitic capacitance | Kangguo Cheng, Darsen D. Lu, Tenko Yamashita | 2020-08-04 |
| 10727345 | Silicon germanium fin immune to epitaxy defect | Kangguo Cheng, Juntao Li | 2020-07-28 |
| 10679890 | Nanosheet structure with isolated gate | Alexander Reznicek, Joshua M. Rubin | 2020-06-09 |
| 10680061 | Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETs | Josephine B. Chang, Michael A. Guillorn, Isaac Lauer | 2020-06-09 |
| 10669579 | DNA sequencing with stacked nanopores | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2020-06-02 |
| 10672888 | Vertical transistors having improved gate length control | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-06-02 |
| 10665694 | Vertical transistors having improved gate length control | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-05-26 |
| 10665666 | Method of forming III-V on insulator structure on semiconductor substrate | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2020-05-26 |
| 10658246 | Self-aligned vertical fin field effect transistor with replacement gate structure | Chen Zhang, Tenko Yamashita, Kangguo Cheng, Juntao Li | 2020-05-19 |