Issued Patents 2020
Showing 1–25 of 141 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879073 | Insulating gate separation structure for transistor devices | Chanro Park, Hui Zang, Laertis Economikos, Andre P. Labonte | 2020-12-29 |
| 10879180 | FinFET with etch-selective spacer and self-aligned contact capping layer | Hui Zang, Guowei Xu, Scott Beasor | 2020-12-29 |
| 10872809 | Contact structures for integrated circuit products | Lars Liebmann, Balasubramanian S. Pranatharthi Haran, Veeraraghavan S. Basker | 2020-12-22 |
| 10872979 | Spacer structures for a transistor device | Hui Zang, Chung Foong Tan, Guowei Xu, Haiting Wang, Yue Zhong +2 more | 2020-12-22 |
| 10872962 | Steep-switch field effect transistor with integrated bi-stable resistive system | Julien Frougier, Nicolas Loubet, Daniel Chanemougame, Ali Razavieh, Kangguo Cheng | 2020-12-22 |
| 10854515 | Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation | Vimal Kamineni, Mark V. Raymond | 2020-12-01 |
| 10840148 | One-time programmable device compatible with vertical transistor processing | Kangguo Cheng, Juntao Li, Chanro Park | 2020-11-17 |
| 10840329 | Nanosheet transistor having improved bottom isolation | Kangguo Cheng, Chun-Chen Yeh | 2020-11-17 |
| 10840147 | Fin cut forming single and double diffusion breaks | Juntao Li, Junli Wang, Kangguo Cheng | 2020-11-17 |
| 10840146 | Structures and SRAM bit cells with a buried cross-couple interconnect | Bipul C. Paul, Julien Frougier | 2020-11-17 |
| 10832954 | Forming a reliable wrap-around contact without source/drain sacrificial regions | Julien Frougier, Kangguo Cheng | 2020-11-10 |
| 10833191 | Integrating nanosheet transistors, on-chip embedded memory, and extended-gate transistors on the same substrate | Julien Frougier, Kangguo Cheng, Juntao Li | 2020-11-10 |
| 10832967 | Tapered fin-type field-effect transistors | Hui Zang, Garo Derderian | 2020-11-10 |
| 10832943 | Gate contact over active region with self-aligned source/drain contact | Su Chen Fan, Cheng Chi, Kangguo Cheng | 2020-11-10 |
| 10833198 | Confined source drain epitaxy to reduce shorts in CMOS integrated circuits | Chun-Chen Yeh, Lan Yu, Alexander Reznicek | 2020-11-10 |
| 10832961 | Sacrificial gate spacer regions for gate contacts formed over the active region of a transistor | Su Chen Fan, Veeraraghavan S. Basker, Andre P. Labonte, Chanro Park | 2020-11-10 |
| 10832916 | Self-aligned gate isolation with asymmetric cut placement | Carl Radens, Kangguo Cheng, Veeraraghavan S. Basker | 2020-11-10 |
| 10832964 | Replacement contact formation for gate contact over active region with selective metal growth | Balasubramanian Pranatharthiharan, Chanro Park, Nicolas Loubet | 2020-11-10 |
| 10832947 | Fully aligned via formation without metal recessing | Chanro Park, Kangguo Cheng, Juntao Li | 2020-11-10 |
| 10832944 | Interconnect structure having reduced resistance variation and method of forming same | Nicholas V. LiCausi, Chanro Park, Andre P. Labonte | 2020-11-10 |
| 10825741 | Methods of forming single diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products | Hui Zang | 2020-11-03 |
| 10825913 | Methods, apparatus, and manufacturing system for FinFET devices with reduced parasitic capacitance | Hui Zang, Haiting Wang | 2020-11-03 |
| 10818674 | Structures and SRAM bit cells integrating complementary field-effect transistors | Randy W. Mann, Bipul C. Paul, Julien Frougier | 2020-10-27 |
| 10818776 | Nanosheet transistor with optimized junction and cladding detectivity control | Kangguo Cheng, Nicolas Loubet, Tenko Yamashita, Chun-Chen Yeh | 2020-10-27 |
| 10818792 | Nanosheet field-effect transistors formed with sacrificial spacers | Julien Frougier, Daniel Chanemougame | 2020-10-27 |