Issued Patents 2020
Showing 26–50 of 141 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10818776 | Nanosheet transistor with optimized junction and cladding detectivity control | Kangguo Cheng, Nicolas Loubet, Tenko Yamashita, Chun-Chen Yeh | 2020-10-27 |
| 10811319 | Middle of line structures | Hui Zang | 2020-10-20 |
| 10804398 | Method of forming wrap-around-contact and the resulting device | Julien Frougier | 2020-10-13 |
| 10804199 | Self-aligned chamferless interconnect structures of semiconductor devices | Yongjun Shi, Nan Fu, Chun Yu Wong | 2020-10-13 |
| 10804379 | FinFET device and method of manufacturing | Hui Zang, Scott Beasor | 2020-10-13 |
| 10804148 | Buried contact to provide reduced VFET feature-to-feature tolerance requirements | Su Chen Fan, Jeffrey C. Shearer, Robert C. Wong | 2020-10-13 |
| 10804136 | Fin structures with bottom dielectric isolation | Kangguo Cheng, Chun-Chen Yeh, Tenko Yamashita | 2020-10-13 |
| 10796957 | Buried contact to provide reduced VFET feature-to-feature tolerance requirements | Su Chen Fan, Jeffrey C. Shearer, Robert C. Wong | 2020-10-06 |
| 10797049 | FinFET structure with dielectric bar containing gate to reduce effective capacitance, and method of forming same | Hui Zang, Haiting Wang, Chung Foong Tan, Guowei Xu, Scott Beasor +1 more | 2020-10-06 |
| 10797154 | Trench silicide contacts with high selectivity process | Andrew M. Greene, Balasubramanian Pranatharthiharan | 2020-10-06 |
| 10788446 | Ion-sensitive field-effect transistor with micro-pillar well to enhance sensitivity | Juntao Li, Kangguo Cheng, Chanro Park | 2020-09-29 |
| 10790363 | IC structure with metal cap on cobalt layer and methods of forming same | Laertis Economikos, Kevin J. Ryan, Hui Zang | 2020-09-29 |
| 10790376 | Contact structures | Chanro Park, Julien Frougier, Kangguo Cheng, Andre P. Labonte | 2020-09-29 |
| 10790379 | Vertical field effect transistor with anchor | Juntao Li, Kangguo Cheng | 2020-09-29 |
| 10790395 | finFET with improved nitride to fin spacing | Injo Ok, Chanro Park, Min Gyu Sung | 2020-09-29 |
| 10790148 | Method to increase effective gate height | Heimanu Niebojewski, Andrew M. Greene | 2020-09-29 |
| 10784171 | Vertically stacked complementary-FET device with independent gate control | Julien Frougier, Puneet Harischandra Suvarna | 2020-09-22 |
| 10784357 | Fabrication of vertical field effect transistor structure with controlled gate length | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2020-09-22 |
| 10777465 | Integration of vertical-transport transistors and planar transistors | Chun-Chen Yeh, Kangguo Cheng, Tenko Yamashita | 2020-09-15 |
| 10770585 | Self-aligned buried contact for vertical field-effect transistor and method of production thereof | Chanro Park, Andre P. Labonte, Daniel Chanemougame | 2020-09-08 |
| 10770388 | Transistor with recessed cross couple for gate contact over active region integration | Veeraraghavan S. Basker, Kangguo Cheng, Jia Zeng, Youngtag Woo, Mahender Kumar +1 more | 2020-09-08 |
| 10770454 | On-chip metal-insulator-metal (MIM) capacitor and methods and systems for forming same | Chanro Park, Kangguo Cheng, Juntao Li | 2020-09-08 |
| 10770562 | Interlayer dielectric replacement techniques with protection for source/drain contacts | Kangguo Cheng, Juntao Li, Andrew M. Greene, Vimal Kamineni, Adra Carr +1 more | 2020-09-08 |
| 10770566 | Unique gate cap and gate cap spacer structures for devices on integrated circuit products | Julien Frougier, Chanro Park, Kangguo Cheng | 2020-09-08 |
| 10763342 | Semiconductor devices having equal thickness gate spacers | Cheng Chi | 2020-09-01 |