Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10832943 | Gate contact over active region with self-aligned source/drain contact | Su Chen Fan, Kangguo Cheng, Ruilong Xie | 2020-11-10 |
| 10763342 | Semiconductor devices having equal thickness gate spacers | Ruilong Xie | 2020-09-01 |
| 10727308 | Gate contact structure for a transistor | Ruilong Xie, Hao Tang, Daniel Chanemougame, Lars Liebmann, Mark V. Raymond | 2020-07-28 |
| 10665586 | Method of concurrently forming source/drain and gate contacts and related device | Ruilong Xie | 2020-05-26 |
| 10658459 | Nanosheet transistor with robust source/drain isolation from substrate | Robin Hsin Kuo Chao, Kangguo Cheng, Ruilong Xie, John H. Zhang | 2020-05-19 |
| 10622475 | Uniform bottom spacer for VFET devices | Steven R. Bentley, Chanro Park, Ruilong Xie, Tenko Yamashita | 2020-04-14 |
| 10593782 | Self-aligned finFET formation | Fee Li Lie, Chi-Chun Liu, Ruilong Xie | 2020-03-17 |