Issued Patents 2020
Showing 226–250 of 332 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10607894 | Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain | Xin Miao, Wenyu Xu, Chen Zhang | 2020-03-31 |
| 10607892 | Junction formation in thick-oxide and thin-oxide vertical FETs on the same chip | Xin Miao, Wenyu Xu, Chen Zhang | 2020-03-31 |
| 10607890 | Selective removal of semiconductor fins | Veeraraghavan S. Basker, Ali Khakifirooz | 2020-03-31 |
| 10605768 | Nanofluid sensor with real-time spatial sensing | Ali Khakifirooz, Ghavam G. Shahidi, Davood Shahrjerdi | 2020-03-31 |
| 10600693 | Fabrication of a vertical fin field effect transistor with reduced dimensional variations | — | 2020-03-24 |
| 10600889 | Nanosheet transistors with thin inner spacers and tight pitch gate | Choonghyun Lee, Juntao Li, Peng Xu | 2020-03-24 |
| 10600886 | Vertical field effect transistors with bottom source/drain epitaxy | Xin Miao, Wenyu Xu, Chen Zhang | 2020-03-24 |
| 10600885 | Vertical fin field effect transistor devices with self-aligned source and drain junctions | Juntao Li, Choonghyun Lee, Shogo Mochizuki | 2020-03-24 |
| 10600878 | Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2020-03-24 |
| 10600877 | Fully depleted SOI device for reducing parasitic back gate capacitance | Ramachandra Divakaruni | 2020-03-24 |
| 10600870 | Semiconductor structure with a silicon germanium alloy fin and silicon germanium alloy pad structure | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2020-03-24 |
| 10600778 | Method and apparatus of forming high voltage varactor and vertical transistor on a substrate | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2020-03-24 |
| 10600695 | Channel strain formation in vertical transport FETS with dummy stressor materials | Choonghyun Lee, Shogo Mochizuki, Juntao Li | 2020-03-24 |
| 10600638 | Nanosheet transistors with sharp junctions | Lawrence A. Clevenger, Balasubramanian S. Pranatharthi Haran, John H. Zhang | 2020-03-24 |
| 10593598 | Vertical FET with various gate lengths by an oxidation process | Xin Miao, Chen Zhang | 2020-03-17 |
| 10593802 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu | 2020-03-17 |
| 10593779 | Replacement metal gate structures | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2020-03-17 |
| 10593753 | Vertical field effect transistor (VFET) device with controllable top spacer | Wenyu Xu, Chen Zhang, Xin Miao | 2020-03-17 |
| 10593679 | Static random access memory (SRAM) density scaling by using middle of line (MOL) flow | Veeraraghavan S. Basker, Sivananda K. Kanakasabapathy, Theodorus E. Standaert, Junli Wang | 2020-03-17 |
| 10593672 | Method and structure of forming strained channels for CMOS device fabrication | Juntao Li, John G. Gaudiello | 2020-03-17 |
| 10593663 | Distributed decoupling capacitor | Ali Khakifirooz, Darsen D. Lu, Ghavam G. Shahidi | 2020-03-17 |
| 10593622 | Electrical fuse and/or resistors structures | Veeraraghavan S. Basker, Ali Khakifirooz, Juntao Li | 2020-03-17 |
| 10592698 | Analog-based multiple-bit chip security | Xin Miao, Wenyu Xu, Chen Zhang | 2020-03-17 |
| 10586857 | Replacement metal gate structures | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2020-03-10 |
| 10586867 | Strained FinFET source drain isloation | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2020-03-10 |