Issued Patents 2016
Showing 1–25 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530864 | Junction overlap control in a semiconductor device using a sacrificial spacer layer | Steven Bentley, Michael Hargrove, Chia-Yu Chen, Ryan O. Jung, Sivanandha K. Kanakasabapathy | 2016-12-27 |
| 9525048 | Symmetrical extension junction formation with low-k spacer and dual epitaxial process in finFET device | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2016-12-20 |
| 9525069 | Structure and method to form a FinFET device | Andres Bryant, Jeffrey B. Johnson, Effendi Leobandung | 2016-12-20 |
| 9520392 | Semiconductor device including finFET and fin varactor | Kangguo Cheng, Junli Wang, Ruilong Xie | 2016-12-13 |
| 9520363 | Forming CMOSFET structures with different contact liners | Kangguo Cheng, Zuoguang Liu | 2016-12-13 |
| 9520500 | Self heating reduction for analog radio frequency (RF) device | Injo Ok, Balasubramanian Pranatharthiharan, Charan V. Surisetty, Soon-Cheon Seo | 2016-12-13 |
| 9514998 | Polysilicon resistor formation in silicon-on-insulator replacement metal gate finFET processes | Veeraraghavan S. Basker, Huiming Bu | 2016-12-06 |
| 9508597 | 3D fin tunneling field effect transistor | Zuoguang Liu, Xin Sun | 2016-11-29 |
| 9508833 | Punch through stopper for semiconductor device | Effendi Leobandung | 2016-11-29 |
| 9508587 | Formation of isolation surrounding well implantation | Kangguo Cheng, Shom Ponoth, Theodorus E. Standaert | 2016-11-29 |
| 9502506 | Structure for FinFET fins | Effendi Leobandung | 2016-11-22 |
| 9502523 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2016-11-22 |
| 9502313 | Polysilicon resistor formation in silicon-on-insulator replacement metal gate finFET processes | Veeraraghavan S. Basker, Huiming Bu | 2016-11-22 |
| 9502309 | Forming CMOSFET structures with different contact liners | Kangguo Cheng, Zuoguang Liu | 2016-11-22 |
| 9496399 | FinFET devices with multiple channel lengths | Effendi Leobandung | 2016-11-15 |
| 9483592 | Maintaining stress in a layout design of an integrated circuit having fin-type field-effect transistor devices | Karthik Balakrishnan, Pouya Hashemi, Jeffrey W. Sleight | 2016-11-01 |
| 9484255 | Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts | Hiroaki Niimi, Shariq Siddiqui | 2016-11-01 |
| 9484262 | Stressed channel bulk fin field effect transistor | Veeraraghavan S. Basker, Akira Hokazono, Hiroshi Itokawa, Chun-Chen Yeh | 2016-11-01 |
| 9484306 | MOSFET with asymmetric self-aligned contact | Kangguo Cheng, Xin Miao, Ruilong Xie | 2016-11-01 |
| 9484431 | Pure boron for silicide contact | Chia-Yu Chen, Zuoguang Liu, Sanjay C. Mehta | 2016-11-01 |
| 9484256 | Pure boron for silicide contact | Chia-Yu Chen, Zuoguang Liu, Sanjay C. Mehta | 2016-11-01 |
| 9478468 | Dual metal contact scheme for CMOS devices | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-10-25 |
| 9478549 | FinFET with dielectric isolation by silicon-on-nothing and method of fabrication | Kangguo Cheng, Balasubramanian S. Haran, Shom Ponoth, Theodorus E. Standaert | 2016-10-25 |
| 9472670 | Field effect transistor device spacers | Rama Kambhampati, Junli Wang, Ruilong Xie | 2016-10-18 |
| 9472408 | Nitridation on HDP oxide before high-k deposition to prevent oxygen ingress | Takashi Ando, Veeraraghavan S. Basker, Johnathan E. Faltermeier, Hemanth Jagannathan | 2016-10-18 |