Issued Patents 2016
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9478549 | FinFET with dielectric isolation by silicon-on-nothing and method of fabrication | Kangguo Cheng, Shom Ponoth, Theodorus E. Standaert, Tenko Yamashita | 2016-10-25 |
| 9406790 | Suspended ring-shaped nanowire structure | Kangguo Cheng, James J. Demarest | 2016-08-02 |
| 9406679 | Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gate | Lisa F. Edge, Hemanth Jagannathan | 2016-08-02 |
| 9406570 | FinFET device | Kangguo Cheng, Shom Ponoth, Theodorus E. Standaert, Tenko Yamashita | 2016-08-02 |
| 9368590 | Silicon-on-insulator transistor with self-aligned borderless source/drain contacts | Susan S. Fan, David V. Horak, Charles W. Koburger, III | 2016-06-14 |
| 9331174 | Method for improving device performance using epitaxially grown silicon carbon (SiC) or silicon-germanium (SiGe) | Bruce B. Doris, Johnathan E. Faltermeier, Lahir M. Shaik Adam | 2016-05-03 |
| 9299719 | CMOS with dual raised source and drain for NMOS and PMOS | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2016-03-29 |
| 9275911 | Hybrid orientation fin field effect transistor and planar field effect transistor | Kangguo Cheng, Shom Ponoth, Theodorus E. Standaert, Tenko Yamashita | 2016-03-01 |
| 9269629 | Dummy fin formation by gas cluster ion beam | Kangguo Cheng, Ali Khakifirooz, Shom Ponoth, Theodorus E. Standaert, Tenko Yamashita | 2016-02-23 |
| 9263466 | CMOS with dual raised source and drain for NMOS and PMOS | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2016-02-16 |
| 9263465 | CMOS with dual raised source and drain for NMOS and PMOS | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2016-02-16 |
| 9257350 | Manufacturing process for finFET device | Kangguo Cheng, Shom Ponoth, Theodorus E. Standaert, Tenko Yamashita | 2016-02-09 |
| 9257531 | Self-aligned contact structure for replacement metal gate | Soon-Cheon Seo, Alexander Reznicek | 2016-02-09 |
| 9245965 | Uniform finFET gate height | Sanjay C. Mehta, Shom Ponoth, Ravikumar Ramachandran, Stefan Schmitz, Theodorus E. Standaert | 2016-01-26 |