Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
AR

Alexander Reznicek

IBM: 126 patents #3 of 10,295Top 1%
Globalfoundries: 48 patents #4 of 2,145Top 1%
IBInternational Business: 1 patents #1 of 8Top 15%
Troy, NY: #1 of 72 inventorsTop 2%
New York: #2 of 11,723 inventorsTop 1%
Overall (2016): #21 of 481,213Top 1%
175 Patents 2016

Issued Patents 2016

Showing 1–25 of 175 patents

Patent #TitleCo-InventorsDate
9530843 FinFET having an epitaxially grown semiconductor on the fin in the channel region Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Davood Shahrjerdi 2016-12-27
9530772 Methods of manufacturing devices including gates with multiple lengths Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-12-27
9530669 Method of making a semiconductor device having a semiconductor material on a relaxed semiconductor including replacing a strained, selective etchable material, with a low density dielectric in a cavity Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-12-27
9530699 Semiconductor device including gate channel having adjusted threshold voltage Pranita Kerber, Qiqing C. Ouyang 2016-12-27
9525027 Lateral bipolar junction transistor having graded SiGe base Pouya Hashemi, Ali Khakifirooz, Darsen D. Lu, Dominic J. Schepis 2016-12-20
9525064 Channel-last replacement metal-gate vertical field effect transistor Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-12-20
9524882 Contact structure and extension formation for III-V nFET Veeraraghavan S. Basker 2016-12-20
9524969 Integrated circuit having strained fins on bulk substrate Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-12-20
9520469 Fabrication of fin structures having high germanium content Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-12-13
9520328 Type III-V and type IV semiconductor device formation Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-12-13
9520394 Contact structure and extension formation for III-V nFET Veeraraghavan S. Basker 2016-12-13
9520397 Abrupt source/drain junction formation using a diffusion facilitation layer Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-12-13
9514995 Implant-free punch through doping layer formation for bulk FinFET structures Keith E. Fogel, Devendra K. Sadana, Dominic J. Schepis 2016-12-06
9515073 III-V semiconductor CMOS FinFET device Hemanth Jagannathan, Devendra K. Sadana, Charan V. Surisetty 2016-12-06
9515194 Nano-ribbon channel transistor with back-bias control Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-12-06
9515173 Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-12-06
9514997 Silicon-germanium FinFET device with controlled junction Kangguo Cheng, Pouya Hashemi, Kam-Leung Lee 2016-12-06
9508810 FET with air gap spacer for improved overlap capacitance Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-11-29
9508725 Trench to trench fin short mitigation Veeraraghavan S. Basker 2016-11-29
9508851 Formation of bulk SiGe fin with dielectric isolation by anodization Thomas N. Adam, Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-11-29
9502540 Uniform height tall fins with varying silicon germanium concentrations Stephen W. Bedell, Bruce B. Doris, Keith E. Fogel 2016-11-22
9502408 FinFET device including fins having a smaller thickness in a channel region, and a method of manufacturing same Pranita Kerber, Qiqing C. Ouyang 2016-11-22
9502420 Structure and method for highly strained germanium channel fins for high mobility pFINFETs Stephen W. Bedell, Lisa F. Edge, Pranita Kerber, Qiqing C. Ouyang 2016-11-22
9502245 Elimination of defects in long aspect ratio trapping trench structures Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-11-22
9502243 Multi-orientation SOI substrates for co-integration of different conductivity type semiconductor devices Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-11-22